embassy-imxrt: migrate from svd2rust PACs to nxp-pac#5931
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I still need to test this on HW, but I left my RT685 board in the office. Hence, draft PR. @i509VCB, FYI. |
Replace the svd2rust-generated mimxrt685s-pac and mimxrt633s-pac
dependencies with the chiptool-generated nxp-pac crate. This is a
pure PAC swap with no functional changes.
Key API transformations applied across all drivers:
- Peripheral access: Peripheral::steal() -> pac::PERIPHERAL singletons
- Register writes: .write(|w| w.field().variant(x)) -> .write(|w| w.set_field(x))
- Register reads: .read().field().bit_is_set() -> .read().field()
- Bit manipulation: .set_bit()/.clear_bit() -> true/false
- Raw bits: unsafe { w.bits(val) } -> w.0 = val or typed setters
- Modify closures: modify(|_, w| ...) -> modify(|w| ...)
Files converted (13 files, 850 insertions, 1095 deletions):
Cargo.toml: Replaced mimxrt685s-pac/mimxrt633s-pac with nxp-pac
git dependency (rev e259e278, feature mimxrt685s_cm33).
chips/mimxrt685s.rs, chips/mimxrt633s.rs: Updated PAC re-export
from mimxrt685s_pac/mimxrt633s_pac to nxp_pac. Updated interrupt
names (ADC0->ADC, DMIC0->DMIC, I3C0->I3C, SCT0->SCT).
clocks.rs: Converted ~37 steal() calls to uppercase singletons.
Replaced all chained register access with set_field() pattern.
Updated clock selection enums to UPPERCASE variants.
dma.rs: Converted DMA0 singleton, channel register access with
per-index accessors, Width enum (BIT_8/BIT_16/BIT_32).
gpio.rs: Changed block() to return pac::gpio::Gpio Copy type.
Converted all pin/direction/interrupt register access.
flexcomm/mod.rs: Updated FlexcommLowLevel trait, Persel enum,
all clock selection enums (FcfclkselSel, FrgclkselSel, etc.).
flexcomm/spi.rs: Changed Info struct to hold pac::spi::Spi (Copy).
Updated config application with UPPERCASE enum variants
(Cpol::LOW/HIGH, Cpha::CHANGE/CAPTURE, Master::MASTER_MODE).
flexcomm/uart.rs: Changed Info struct to hold pac::usart::Usart
(Copy). Updated Config defaults, Drop impls, blocking I/O,
async DMA operations, and interrupt handler.
iopctl.rs: Changed Reg type to Reg<Pio, RW> with manual pointer
computation for runtime port/pin indexing (no generic pio()
method in nxp-pac). FC15 pins use Reg::from_ptr cast.
crc.rs: Created local Polynomial enum since nxp-pac uses raw u8
for CRC polynomial field. Converted all register access.
rng.rs: Converted TRNG register access. TRNG int_status,
int_ctrl, and int_mask fields use typed enums (IntStatusEntVal,
IntCtrlHwErr, etc.) instead of bools.
time_driver.rs: Converted OS timer and RTC register access to
nxp-pac singletons and set_field() patterns.
Also fixed pre-existing clippy warnings:
- Added #[allow(clippy::too_many_arguments)] to DMA copy_inner
and UART new_with_rtscts
- Fixed SAFETY -> # Safety doc section format in DMA
- Replaced iter().any() with contains() in RNG
- Replaced if-let-Err-return-Err with ? operator in clocks
- Replaced manual modulo check with is_multiple_of() in clocks
All 10 examples build successfully. Clippy clean with -D warnings.
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Replace the svd2rust-generated mimxrt685s-pac and mimxrt633s-pac dependencies with the chiptool-generated nxp-pac crate. This is a pure PAC swap with no functional changes.