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mspm0: add HFXT + MCLK source config (G350x)#6222

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mspm0: add HFXT + MCLK source config (G350x)#6222
ozongzi wants to merge 1 commit into
embassy-rs:mainfrom
ozongzi:feat/mspm0-clock-config-g350x

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@ozongzi

@ozongzi ozongzi commented May 31, 2026

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Replaces the // TODO: OSC configuration placeholder in Config with a clock submodule that brings up the external HFXT crystal on PA5/PA6 and optionally switches MCLK over to HSCLK <- HFCLK.

Scope:

  • Gated on the existing mspm0g350x family cfg flag.
  • Bench-validated on MSPM0G3507PM with a 40 MHz crystal driving MCLK.
  • Same register layout per TI TRM applies to MSPM0G3506; not bench- verified there, so reviewers can widen the gate at their discretion.

Out of scope (left for follow-ups):

  • SYSPLL routing as an HSCLK source.
  • MDIV and UDIV dividers.
  • Other families.

The embassy-time driver runs on LFCLK (32.768 kHz, independent of MCLK), so switching MCLK does not skew Timer durations.

A clock_hfxt example in examples/mspm0g3507 demonstrates the new Config fields with a 1 Hz blink.

Replaces the `// TODO: OSC configuration` placeholder in Config with a
`clock` submodule that brings up the external HFXT crystal on PA5/PA6
and optionally switches MCLK over to HSCLK <- HFCLK.

Scope:
- Gated on the existing `mspm0g350x` family cfg flag.
- Bench-validated on MSPM0G3507PM with a 40 MHz crystal driving MCLK.
- Same register layout per TI TRM applies to MSPM0G3506; not bench-
  verified there, so reviewers can widen the gate at their discretion.

Out of scope (left for follow-ups):
- SYSPLL routing as an HSCLK source.
- MDIV and UDIV dividers.
- Other families.

The `embassy-time` driver runs on LFCLK (32.768 kHz, independent of
MCLK), so switching MCLK does not skew Timer durations.

A `clock_hfxt` example in `examples/mspm0g3507` demonstrates the new
Config fields with a 1 Hz blink.

Co-Authored-By: Claude Opus 4.7 <noreply@anthropic.com>
Copilot AI review requested due to automatic review settings May 31, 2026 12:45

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Pull request overview

Note

Copilot was unable to run its full agentic suite in this review.

Adds MSPM0G350x clock-tree configuration support (HFXT bring-up + optional MCLK switch to HSCLK) and provides an example demonstrating 40 MHz HFXT usage.

Changes:

  • Introduces a new embassy_mspm0::clock module (gated to mspm0g350x) with HFXT + MCLK selection configuration.
  • Extends embassy_mspm0::Config and init() to apply clock configuration early during boot.
  • Adds an MSPM0G3507 example that boots from an external 40 MHz crystal and blinks an LED.

Reviewed changes

Copilot reviewed 3 out of 3 changed files in this pull request and generated 2 comments.

File Description
examples/mspm0g3507/src/bin/clock_hfxt.rs New example showing how to enable HFXT and switch MCLK to HSCLK.
embassy-mspm0/src/lib.rs Exposes clock module (MSPM0G350x) and wires clock configuration into Config + init().
embassy-mspm0/src/clock.rs New clock-tree driver implementing HFXT enable and MCLK switch to HSCLK.

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w.set_useexthfclk(false);
});

while !s.clkstatus().read().hfclkgood() {}
Comment on lines +154 to +157
while !s.clkstatus().read().hsclkgood() {}

s.mclkcfg().modify(|w| w.set_usehsclk(true));
while s.clkstatus().read().hsclkmux() != vals::Hsclkmux::HSCLK {}
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2 participants