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Adding CodeCell ESP32C3 new 3rd part board #10177
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feat(variants): Add CodeCell ESP32C3 variant folder Added the `codecell` folder to the `arduino-esp32/variants` directory to support the CodeCell ESP32C3 board. This folder includes the necessary pin mappings and configuration files.
chore(board): Update boards.txt for CodeCell ESP32C3 Updated the boards.txt configuration to include settings specific to the CodeCell ESP32C3 board, such as upload speed and partition schemes.
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@microbotsio PTAL
Co-authored-by: Jan Procházka <[email protected]>
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LGTM
Can you explain why it the boards test and failed to merge? |
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feat(variants): Add codecell ESP32C3 variant folder Added the CodeCell ESP32C3 variant folder to support the CodeCell ESP32C3 board. This folder contains the necessary pin mappings and configuration files.
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LGTM
Is there anything else we need to do from our side? |
@microbotsio All good from your side, the PR ready to be merged (marked as pending merge). We will merge it soon :) |
great thanks! |
Could you please let me know when the next 3.0.5 release is scheduled? :) We like our board to show up in Board Manager |
@microbotsio why was SCK mapped to pin 4, when that seems to be used for something else (referencing https://github.com/microbotsio/CodeCell/blob/main/hardware/CodeCell%20Schematics.png)? My understanding is that the ESP32 can make peripherals at will, so this can be overridden when constructing the
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Thanks for taking interest in this matter! We're checking if we can
update this in the coming future
…On Thu, 16 Jan 2025 at 05:10, Gus Wynn ***@***.***> wrote:
@microbotsio <https://github.com/microbotsio> why was SCK mapped to pin
4, when that seems to be used for something else (referencing
https://github.com/microbotsio/CodeCell/blob/main/hardware/CodeCell%20Schematics.png)?
My understanding is that the ESP32 can make peripherals at will, so this
can be overridden when constructing the SPIClass, but if I am reading
https://www.espressif.com/sites/default/files/documentation/esp32-c3_datasheet_en.pdf#cd-pins-io-mux-gpio,
correctly, the high throughput using the IO MUX would be:
static const uint8_t SS = 5; // this one would need to go through the gpio mux, so it will have a latency hit; the direct pin is 10, as far as i can tell, which is used for something else. It's unclear if this affects the throughput of the spi interface in general.
static const uint8_t MOSI = 2;
static const uint8_t MISO = 7;
static const uint8_t SCK = 6;
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Adding CodeCell ESP32C3 new 3rd part board with updating boards.txt and adding the pins_arduino.h in the variant/CodeCell folder.