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FPGA code to test a 1-bit Full Adder, manually or automatically.

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Name		Name	Last commit message	Last commit date
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constraint		constraint
source		source
work		work
GGHH.mojo		GGHH.mojo
README.md		README.md

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MojoV3Fullader

FPGA code to test a 1-bit Full Adder, manually or automatically.

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FPGA code to test a 1-bit Full Adder, manually or automatically.

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