modules/zstd/frame_header: Specify required reset-related codegen args

Internal-tag: [#52186] Signed-off-by: Pawel Czarnecki <[email protected]>
google · Mar 7, 2024 · 9f1441b · 9f1441b
1 parent c9638e3
commit 9f1441b
Showing 1 changed file with 2 additions and 0 deletions.
diff --git a/xls/modules/zstd/BUILD b/xls/modules/zstd/BUILD
@@ -228,6 +228,8 @@ xls_dslx_verilog(
         "module_name": "FrameHeaderDecoder",
         "delay_model": "asap7",
         "pipeline_stages": "9",
+        "reset": "rst",
+        "reset_data_path": "false",
         "use_system_verilog": "false",
     },
     dslx_top = "parse_frame_header_128",