fix(kernel): use Triton FP8 quantization on SM120

[lucifer1004]

Summary

• route SM120 online MXFP8 activation quantization for FlashInfer and Triton GEMMs through TokenSpeed's Triton token-group kernel
• expose that Triton quantizer on NVIDIA while preventing unsupported TRT-LLM FP8 quantizers from being selected beyond SM10.x
• reload quantization registrations in the existing kernel API test fixture now that GEMM uses the public quantization boundary

Root cause

The TRT-LLM dynamic FP8 operators bundled in the current environment do not have SM120 kernel images. The 1x128 path also exposes a flat padded scale tensor where the GEMM adapter expects a two-dimensional group-major layout. Selecting it for SM120 therefore fails before the FlashInfer GEMM can run and can leave a delayed cudaErrorNoKernelImageForDevice in the CUDA context.

The existing TokenSpeed Triton quantizer produces the row-major [tokens, K / 128] scales consumed by the SM120 FlashInfer GEMM. Other architectures keep their existing selection path and priorities.

Validation

• inferlab run --environment tokenspeed -- pytest tokenspeed/tokenspeed-kernel/test/ops/test_quantization.py tokenspeed/tokenspeed-kernel/test/test_kernel_api_selection.py -q (31 passed, 50 skipped)
• prek run --all-files