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InstCombine: Fold samesign ult to slt with added constant when the range is known #134556

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InstCombine: Fold samesign ult to slt with added constant when the range is known #134556

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d27f5e2
Precommit baseline tests
RAJAGOPALAN-GANGADHARAN Apr 6, 2025
ffb56f6
InstCombine: Fold samesign ult to slt with resolved constant
RAJAGOPALAN-GANGADHARAN Apr 6, 2025
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13 changes: 9 additions & 4 deletions llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -3119,7 +3119,7 @@ Instruction *InstCombinerImpl::foldICmpAddConstant(ICmpInst &Cmp,

Value *Op0, *Op1;
Instruction *Ext0, *Ext1;
const CmpInst::Predicate Pred = Cmp.getPredicate();
const CmpPredicate Pred = Cmp.getCmpPredicate();
if (match(Add,
m_Add(m_CombineAnd(m_Instruction(Ext0), m_ZExtOrSExt(m_Value(Op0))),
m_CombineAnd(m_Instruction(Ext1),
Expand Down Expand Up @@ -3156,7 +3156,8 @@ Instruction *InstCombinerImpl::foldICmpAddConstant(ICmpInst &Cmp,
// the constants. Equality comparisons are handled elsewhere. SGE/SLE/UGE/ULE
// are canonicalized to SGT/SLT/UGT/ULT.
if ((Add->hasNoSignedWrap() &&
(Pred == ICmpInst::ICMP_SGT || Pred == ICmpInst::ICMP_SLT)) ||
(Pred.getPreferredSignedPredicate() == ICmpInst::ICMP_SGT ||
Pred.getPreferredSignedPredicate() == ICmpInst::ICMP_SLT)) ||
(Add->hasNoUnsignedWrap() &&
(Pred == ICmpInst::ICMP_UGT || Pred == ICmpInst::ICMP_ULT))) {
bool Overflow;
Expand All @@ -3165,9 +3166,13 @@ Instruction *InstCombinerImpl::foldICmpAddConstant(ICmpInst &Cmp,
// If there is overflow, the result must be true or false.
// TODO: Can we assert there is no overflow because InstSimplify always
// handles those cases?
if (!Overflow)
if (!Overflow) {
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This looks incorrect as implemented, because the isSigned() check above still uses the original predicate. It would be good to add a test for a case where the ssub_ov vs usub_ov distinction is relevant.

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The overall implementation approach here is iffy, because for the nuw+nsw+samesign case we could use both the signed and unsigned predicate, so we should try both, with a preference for unsigned.

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  1. You are right, let me fix it. Will also add a test for the overflow cases.
  2. I don't get the second comment, can an instruction have both nsw and nuw at the same time how would that work?

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Interesting just noticed the tests related to nuw and nsw failing, let me check on this.

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I don't get the second comment, can an instruction have both nsw and nuw at the same time how would that work?

Yes, you can have both nsw and nuw on an instruction. It's pretty common. E.g. add i32 1, 1 is both nuw and nsw.

const CmpInst::Predicate EquivPredicate =
Add->hasNoSignedWrap() ? Pred.getPreferredSignedPredicate()
: Cmp.getPredicate();
// icmp Pred (add nsw X, C2), C --> icmp Pred X, (C - C2)
return new ICmpInst(Pred, X, ConstantInt::get(Ty, NewC));
return new ICmpInst(EquivPredicate, X, ConstantInt::get(Ty, NewC));
}
}

if (ICmpInst::isUnsigned(Pred) && Add->hasNoSignedWrap() &&
Expand Down
24 changes: 24 additions & 0 deletions llvm/test/Transforms/InstCombine/icmp-add.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -3302,3 +3302,27 @@ entry:
%cmp = icmp ult i32 %add, 253
ret i1 %cmp
}

define i1 @icmp_partial_negative_samesign_ult_folded_to_slt(i8 range(i8 -1, 5) %x) {
; CHECK-LABEL: @icmp_partial_negative_samesign_ult_folded_to_slt(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[X:%.*]], 2
; CHECK-NEXT: ret i1 [[CMP]]
;
entry:
%add = add nsw i8 %x, -5
%cmp = icmp samesign ult i8 %add, -3
ret i1 %cmp
}

define i1 @icmp_positive_samesign_ult_folded_to_ult(i8 range(i8 1, 5) %x) {
; CHECK-LABEL: @icmp_positive_samesign_ult_folded_to_ult(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ult i8 [[X:%.*]], 2
; CHECK-NEXT: ret i1 [[CMP]]
;
entry:
%add = add nsw i8 %x, 1
%cmp = icmp samesign slt i8 %add, 3
ret i1 %cmp
}
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