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m68kdasm.cpp
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// license:BSD-3-Clause
// copyright-holders:Karl Stenerud
/* ======================================================================== */
/* ========================= LICENSING & COPYRIGHT ======================== */
/* ======================================================================== */
/*
* MUSASHI
* Version 3.32
*
* A portable Motorola M680x0 processor emulation engine.
* Copyright Karl Stenerud.
*
*/
/* ======================================================================== */
/* ================================ INCLUDES ============================== */
/* ======================================================================== */
#include "emu.h"
#include "m68kdasm.h"
std::string m68k_disassembler::make_signed_hex_str_8(u8 val)
{
if(val == 0x80)
return "-$80";
else if(val & 0x80)
return util::string_format("-$%x", (-val) & 0x7f);
else
return util::string_format("$%x", val & 0x7f);
}
std::string m68k_disassembler::make_signed_hex_str_16(u16 val)
{
if(val == 0x8000)
return "-$8000";
else if(val & 0x8000)
return util::string_format("-$%x", (-val) & 0x7fff);
else
return util::string_format("$%x", val & 0x7fff);
}
std::string m68k_disassembler::make_signed_hex_str_32(u32 val)
{
if(val == 0x80000000)
return "-$80000000";
else if(val & 0x80000000)
return util::string_format("-$%x", (-val) & 0x7fffffff);
else
return util::string_format("$%x", val & 0x7fffffff);
}
std::string m68k_disassembler::get_imm_str_s(u32 size)
{
switch(size)
{
case 0: return util::string_format("#%s", make_signed_hex_str_8(read_imm_8()));
case 1: return util::string_format("#%s", make_signed_hex_str_16(read_imm_16()));
case 2: return util::string_format("#%s", make_signed_hex_str_32(read_imm_32()));
default: abort();
}
}
std::string m68k_disassembler::get_imm_str_u(u32 size)
{
switch(size)
{
case 0: return util::string_format("#$%x", read_imm_8());
case 1: return util::string_format("#$%x", read_imm_16());
case 2: return util::string_format("#$%x", read_imm_32());
default: abort();
}
}
std::string m68k_disassembler::get_ea_mode_str(u16 instruction, u32 size)
{
switch(instruction & 0x3f)
{
case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
/* data register direct */
return util::string_format("D%d", instruction&7);
break;
case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f:
/* address register direct */
return util::string_format("A%d", instruction&7);
break;
case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
/* address register indirect */
return util::string_format("(A%d)", instruction&7);
break;
case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
/* address register indirect with postincrement */
return util::string_format("(A%d)+", instruction&7);
break;
case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
/* address register indirect with predecrement */
return util::string_format("-(A%d)", instruction&7);
break;
case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:
/* address register indirect with displacement*/
return util::string_format("(%s,A%d)", make_signed_hex_str_16(read_imm_16()), instruction&7);
break;
case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
{
/* address register indirect with index */
u16 extension = read_imm_16();
if((m_cpu_type & M68010_LESS) && ext_index_scale(extension))
break;
if(ext_full(extension))
{
if(m_cpu_type & M68010_LESS)
break;
if(ext_effective_zero(extension))
return "0";
u32 base = ext_base_displacement_present(extension) ? (ext_base_displacement_long(extension) ? read_imm_32() : read_imm_16()) : 0;
u32 outer = ext_outer_displacement_present(extension) ? (ext_outer_displacement_long(extension) ? read_imm_32() : read_imm_16()) : 0;
std::string base_reg = ext_base_register_present(extension) ? util::string_format("A%d", instruction&7) : "";
std::string index_reg = ext_index_register_present(extension) ?
util::string_format("%c%d.%c%s", ext_index_ar(extension) ? 'A' : 'D', ext_index_register(extension), ext_index_long(extension) ? 'l' : 'w',
ext_index_scale(extension) ? util::string_format("*%d", 1 << ext_index_scale(extension)) : "")
: "";
bool preindex = (extension&7) > 0 && (extension&7) < 4;
bool postindex = (extension&7) > 4;
std::string mode = "(";
if(preindex || postindex)
mode += '[';
bool comma = false;
if(base)
{
if(ext_base_displacement_long(extension))
mode += make_signed_hex_str_32(base);
else
mode += make_signed_hex_str_16(base);
comma = true;
}
if(!base_reg.empty())
{
if(comma)
mode += ',';
mode += base_reg;
comma = true;
}
if(postindex)
{
mode += ']';
comma = true;
}
if(!index_reg.empty())
{
if(comma)
mode += ',';
mode += index_reg;
comma = true;
}
if(preindex)
{
mode += ']';
}
if(outer)
{
if(comma)
mode += ',';
mode += make_signed_hex_str_16(outer);
}
mode += ')';
return mode;
}
std::string mode = ext_8bit_displacement(extension) ?
util::string_format("(%s,A%d,%c%d.%c", make_signed_hex_str_8(extension), instruction&7, ext_index_ar(extension) ? 'A' : 'D', ext_index_register(extension), ext_index_long(extension) ? 'l' : 'w') :
util::string_format("(A%d,%c%d.%c", instruction&7, ext_index_ar(extension) ? 'A' : 'D', ext_index_register(extension), ext_index_long(extension) ? 'l' : 'w');
if(ext_index_scale(extension))
mode += util::string_format("*%d", 1 << ext_index_scale(extension));
mode += ')';
return mode;
}
case 0x38:
/* absolute short address */
return util::string_format("$%x.w", read_imm_16());
break;
case 0x39:
/* absolute long address */
return util::string_format("$%x.l", read_imm_32());
break;
case 0x3a:
{
/* program counter with displacement */
u16 temp_value = read_imm_16();
return util::string_format("(%s,PC) ; ($%x)", make_signed_hex_str_16(temp_value),
(make_int_16(temp_value) + m_cpu_pc-2) & 0xffffffff);
}
case 0x3b:
{
/* program counter with index */
u16 extension = read_imm_16();
if((m_cpu_type & M68010_LESS) && ext_index_scale(extension))
break;
if(ext_full(extension))
{
if(m_cpu_type & M68010_LESS)
break;
if(ext_effective_zero(extension))
return "0";
u32 base = ext_base_displacement_present(extension) ? (ext_base_displacement_long(extension) ? read_imm_32() : read_imm_16()) : 0;
u32 outer = ext_outer_displacement_present(extension) ? (ext_outer_displacement_long(extension) ? read_imm_32() : read_imm_16()) : 0;
std::string base_reg = ext_base_register_present(extension) ? "PC" : "";
std::string index_reg =
ext_index_register_present(extension) ?
util::string_format("%c%d.%c%s", ext_index_ar(extension) ? 'A' : 'D', ext_index_register(extension), ext_index_long(extension) ? 'l' : 'w',
ext_index_scale(extension) ?
util::string_format("*%d", 1 << ext_index_scale(extension)) : "") : "";
bool preindex = (extension&7) > 0 && (extension&7) < 4;
bool postindex = (extension&7) > 4;
bool comma = false;
std::string mode = "(";
if(preindex || postindex)
mode += '[';
if(base)
{
mode += make_signed_hex_str_16(base);
comma = true;
}
if(!base_reg.empty())
{
if(comma)
mode += ',';
mode += base_reg;
comma = true;
}
if(postindex)
{
mode += ']';
comma = true;
}
if(!index_reg.empty())
{
if(comma)
mode += ',';
mode += index_reg;
comma = true;
}
if(preindex)
{
mode += ']';
comma = true;
}
if(outer)
{
if(comma)
mode += ',';
mode += make_signed_hex_str_16(outer);
}
mode += ')';
return mode;
}
std::string mode = ext_8bit_displacement(extension) ?
util::string_format("(%s,PC,%c%d.%c", make_signed_hex_str_8(extension), ext_index_ar(extension) ? 'A' : 'D', ext_index_register(extension), ext_index_long(extension) ? 'l' : 'w') :
util::string_format("(PC,%c%d.%c", ext_index_ar(extension) ? 'A' : 'D', ext_index_register(extension), ext_index_long(extension) ? 'l' : 'w');
if(ext_index_scale(extension))
mode += util::string_format("*%d", 1 << ext_index_scale(extension));
mode += ')';
return mode;
}
case 0x3c:
/* Immediate */
return get_imm_str_u(size);
}
return util::string_format("INVALID %x", instruction & 0x3f);
}
/* ======================================================================== */
/* ================================= DATA ================================= */
/* ======================================================================== */
/* used by ops like asr, ror, addq, etc */
const u32 m68k_disassembler::m_3bit_qdata_table[8] = {8, 1, 2, 3, 4, 5, 6, 7};
const u32 m68k_disassembler::m_5bit_data_table[32] =
{
32, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31
};
const char *const m68k_disassembler::m_cc[16] =
{
"t", "f", "hi", "ls", "cc", "cs", "ne", "eq", "vc", "vs", "pl", "mi", "ge", "lt", "gt", "le"
};
const char *const m68k_disassembler::m_cpcc[64] =
{/* 000 001 010 011 100 101 110 111 */
"f", "eq", "ogt", "oge", "olt", "ole", "ogl", "or", /* 000 */
"un", "ueq", "ugt", "uge", "ult", "ule", "ne", "t", /* 001 */
"sf", "seq", "gt", "ge", "lt", "le", "gl", "gle", /* 010 */
"ngle", "ngl", "nle", "nlt", "nge", "ngt", "sne", "st", /* 011 */
"?", "?", "?", "?", "?", "?", "?", "?", /* 100 */
"?", "?", "?", "?", "?", "?", "?", "?", /* 101 */
"?", "?", "?", "?", "?", "?", "?", "?", /* 110 */
"?", "?", "?", "?", "?", "?", "?", "?" /* 111 */
};
const char *const m68k_disassembler::m_mmuregs[8] =
{
"tc", "drp", "srp", "crp", "cal", "val", "sccr", "acr"
};
const char *const m68k_disassembler::m_mmucond[16] =
{
"bs", "bc", "ls", "lc", "ss", "sc", "as", "ac",
"ws", "wc", "is", "ic", "gs", "gc", "cs", "cc"
};
std::pair<bool, std::string> m68k_disassembler::limit_cpu_types(u32 allowed)
{
if(!(m_cpu_type & allowed))
{
if((m_cpu_ir & 0xf000) == 0xf000)
return std::make_pair(true, d68000_1111());
else
return std::make_pair(true, d68000_illegal());
}
return std::make_pair(false, std::string());
}
/* ======================================================================== */
/* ========================= INSTRUCTION HANDLERS ========================= */
/* ======================================================================== */
/* Instruction handler function names follow this convention:
*
* d68000_NAME_EXTENSIONS(void)
* where NAME is the name of the opcode it handles and EXTENSIONS are any
* extensions for special instances of that opcode.
*
* Examples:
* d68000_add_er_8(): add opcode, from effective address to register,
* size = byte
*
* d68000_asr_s_8(): arithmetic shift right, static count, size = byte
*
*
* Common extensions:
* 8 : size = byte
* 16 : size = word
* 32 : size = long
* rr : register to register
* mm : memory to memory
* r : register
* s : static
* er : effective address -> register
* re : register -> effective address
* ea : using effective address mode of operation
* d : data register direct
* a : address register direct
* ai : address register indirect
* pi : address register indirect with postincrement
* pd : address register indirect with predecrement
* di : address register indirect with displacement
* ix : address register indirect with index
* aw : absolute word
* al : absolute long
*/
std::string m68k_disassembler::d68000_illegal()
{
return util::string_format("dc.w $%04x; ILLEGAL", m_cpu_ir);
}
std::string m68k_disassembler::d68000_1010()
{
return util::string_format("dc.w $%04x; opcode 1010", m_cpu_ir);
}
std::string m68k_disassembler::d68000_1111()
{
return util::string_format("dc.w $%04x; opcode 1111", m_cpu_ir);
}
std::string m68k_disassembler::d68000_abcd_rr()
{
return util::string_format("abcd D%d, D%d", m_cpu_ir&7, (m_cpu_ir>>9)&7);
}
std::string m68k_disassembler::d68000_abcd_mm()
{
return util::string_format("abcd -(A%d), -(A%d)", m_cpu_ir&7, (m_cpu_ir>>9)&7);
}
std::string m68k_disassembler::d68000_add_er_8()
{
return util::string_format("add.b %s, D%d", get_ea_mode_str_8(m_cpu_ir), (m_cpu_ir>>9)&7);
}
std::string m68k_disassembler::d68000_add_er_16()
{
return util::string_format("add.w %s, D%d", get_ea_mode_str_16(m_cpu_ir), (m_cpu_ir>>9)&7);
}
std::string m68k_disassembler::d68000_add_er_32()
{
return util::string_format("add.l %s, D%d", get_ea_mode_str_32(m_cpu_ir), (m_cpu_ir>>9)&7);
}
std::string m68k_disassembler::d68000_add_re_8()
{
return util::string_format("add.b D%d, %s", (m_cpu_ir>>9)&7, get_ea_mode_str_8(m_cpu_ir));
}
std::string m68k_disassembler::d68000_add_re_16()
{
return util::string_format("add.w D%d, %s", (m_cpu_ir>>9)&7, get_ea_mode_str_16(m_cpu_ir));
}
std::string m68k_disassembler::d68000_add_re_32()
{
return util::string_format("add.l D%d, %s", (m_cpu_ir>>9)&7, get_ea_mode_str_32(m_cpu_ir));
}
std::string m68k_disassembler::d68000_adda_16()
{
return util::string_format("adda.w %s, A%d", get_ea_mode_str_16(m_cpu_ir), (m_cpu_ir>>9)&7);
}
std::string m68k_disassembler::d68000_adda_32()
{
return util::string_format("adda.l %s, A%d", get_ea_mode_str_32(m_cpu_ir), (m_cpu_ir>>9)&7);
}
std::string m68k_disassembler::d68000_addi_8()
{
std::string str = get_imm_str_s8();
return util::string_format("addi.b %s, %s", str, get_ea_mode_str_8(m_cpu_ir));
}
std::string m68k_disassembler::d68000_addi_16()
{
std::string str = get_imm_str_s16();
return util::string_format("addi.w %s, %s", str, get_ea_mode_str_16(m_cpu_ir));
}
std::string m68k_disassembler::d68000_addi_32()
{
std::string str = get_imm_str_s32();
return util::string_format("addi.l %s, %s", str, get_ea_mode_str_32(m_cpu_ir));
}
std::string m68k_disassembler::d68000_addq_8()
{
return util::string_format("addq.b #%d, %s", m_3bit_qdata_table[(m_cpu_ir>>9)&7], get_ea_mode_str_8(m_cpu_ir));
}
std::string m68k_disassembler::d68000_addq_16()
{
return util::string_format("addq.w #%d, %s", m_3bit_qdata_table[(m_cpu_ir>>9)&7], get_ea_mode_str_16(m_cpu_ir));
}
std::string m68k_disassembler::d68000_addq_32()
{
return util::string_format("addq.l #%d, %s", m_3bit_qdata_table[(m_cpu_ir>>9)&7], get_ea_mode_str_32(m_cpu_ir));
}
std::string m68k_disassembler::d68000_addx_rr_8()
{
return util::string_format("addx.b D%d, D%d", m_cpu_ir&7, (m_cpu_ir>>9)&7);
}
std::string m68k_disassembler::d68000_addx_rr_16()
{
return util::string_format("addx.w D%d, D%d", m_cpu_ir&7, (m_cpu_ir>>9)&7);
}
std::string m68k_disassembler::d68000_addx_rr_32()
{
return util::string_format("addx.l D%d, D%d", m_cpu_ir&7, (m_cpu_ir>>9)&7);
}
std::string m68k_disassembler::d68000_addx_mm_8()
{
return util::string_format("addx.b -(A%d), -(A%d)", m_cpu_ir&7, (m_cpu_ir>>9)&7);
}
std::string m68k_disassembler::d68000_addx_mm_16()
{
return util::string_format("addx.w -(A%d), -(A%d)", m_cpu_ir&7, (m_cpu_ir>>9)&7);
}
std::string m68k_disassembler::d68000_addx_mm_32()
{
return util::string_format("addx.l -(A%d), -(A%d)", m_cpu_ir&7, (m_cpu_ir>>9)&7);
}
std::string m68k_disassembler::d68000_and_er_8()
{
return util::string_format("and.b %s, D%d", get_ea_mode_str_8(m_cpu_ir), (m_cpu_ir>>9)&7);
}
std::string m68k_disassembler::d68000_and_er_16()
{
return util::string_format("and.w %s, D%d", get_ea_mode_str_16(m_cpu_ir), (m_cpu_ir>>9)&7);
}
std::string m68k_disassembler::d68000_and_er_32()
{
return util::string_format("and.l %s, D%d", get_ea_mode_str_32(m_cpu_ir), (m_cpu_ir>>9)&7);
}
std::string m68k_disassembler::d68000_and_re_8()
{
return util::string_format("and.b D%d, %s", (m_cpu_ir>>9)&7, get_ea_mode_str_8(m_cpu_ir));
}
std::string m68k_disassembler::d68000_and_re_16()
{
return util::string_format("and.w D%d, %s", (m_cpu_ir>>9)&7, get_ea_mode_str_16(m_cpu_ir));
}
std::string m68k_disassembler::d68000_and_re_32()
{
return util::string_format("and.l D%d, %s", (m_cpu_ir>>9)&7, get_ea_mode_str_32(m_cpu_ir));
}
std::string m68k_disassembler::d68000_andi_8()
{
std::string str = get_imm_str_u8();
return util::string_format("andi.b %s, %s", str, get_ea_mode_str_8(m_cpu_ir));
}
std::string m68k_disassembler::d68000_andi_16()
{
std::string str = get_imm_str_u16();
return util::string_format("andi.w %s, %s", str, get_ea_mode_str_16(m_cpu_ir));
}
std::string m68k_disassembler::d68000_andi_32()
{
std::string str = get_imm_str_u32();
return util::string_format("andi.l %s, %s", str, get_ea_mode_str_32(m_cpu_ir));
}
std::string m68k_disassembler::d68000_andi_to_ccr()
{
return util::string_format("andi %s, CCR", get_imm_str_u8());
}
std::string m68k_disassembler::d68000_andi_to_sr()
{
return util::string_format("andi %s, SR", get_imm_str_u16());
}
std::string m68k_disassembler::d68000_asr_s_8()
{
return util::string_format("asr.b #%d, D%d", m_3bit_qdata_table[(m_cpu_ir>>9)&7], m_cpu_ir&7);
}
std::string m68k_disassembler::d68000_asr_s_16()
{
return util::string_format("asr.w #%d, D%d", m_3bit_qdata_table[(m_cpu_ir>>9)&7], m_cpu_ir&7);
}
std::string m68k_disassembler::d68000_asr_s_32()
{
return util::string_format("asr.l #%d, D%d", m_3bit_qdata_table[(m_cpu_ir>>9)&7], m_cpu_ir&7);
}
std::string m68k_disassembler::d68000_asr_r_8()
{
return util::string_format("asr.b D%d, D%d", (m_cpu_ir>>9)&7, m_cpu_ir&7);
}
std::string m68k_disassembler::d68000_asr_r_16()
{
return util::string_format("asr.w D%d, D%d", (m_cpu_ir>>9)&7, m_cpu_ir&7);
}
std::string m68k_disassembler::d68000_asr_r_32()
{
return util::string_format("asr.l D%d, D%d", (m_cpu_ir>>9)&7, m_cpu_ir&7);
}
std::string m68k_disassembler::d68000_asr_ea()
{
return util::string_format("asr.w %s", get_ea_mode_str_16(m_cpu_ir));
}
std::string m68k_disassembler::d68000_asl_s_8()
{
return util::string_format("asl.b #%d, D%d", m_3bit_qdata_table[(m_cpu_ir>>9)&7], m_cpu_ir&7);
}
std::string m68k_disassembler::d68000_asl_s_16()
{
return util::string_format("asl.w #%d, D%d", m_3bit_qdata_table[(m_cpu_ir>>9)&7], m_cpu_ir&7);
}
std::string m68k_disassembler::d68000_asl_s_32()
{
return util::string_format("asl.l #%d, D%d", m_3bit_qdata_table[(m_cpu_ir>>9)&7], m_cpu_ir&7);
}
std::string m68k_disassembler::d68000_asl_r_8()
{
return util::string_format("asl.b D%d, D%d", (m_cpu_ir>>9)&7, m_cpu_ir&7);
}
std::string m68k_disassembler::d68000_asl_r_16()
{
return util::string_format("asl.w D%d, D%d", (m_cpu_ir>>9)&7, m_cpu_ir&7);
}
std::string m68k_disassembler::d68000_asl_r_32()
{
return util::string_format("asl.l D%d, D%d", (m_cpu_ir>>9)&7, m_cpu_ir&7);
}
std::string m68k_disassembler::d68000_asl_ea()
{
return util::string_format("asl.w %s", get_ea_mode_str_16(m_cpu_ir));
}
std::string m68k_disassembler::d68000_bcc_8()
{
u32 temp_pc = m_cpu_pc;
m_flags = STEP_COND;
return util::string_format("b%-2s $%x", m_cc[(m_cpu_ir>>8)&0xf], temp_pc + make_int_8(m_cpu_ir));
}
std::string m68k_disassembler::d68000_bcc_16()
{
u32 temp_pc = m_cpu_pc;
m_flags = STEP_COND;
return util::string_format("b%-2s $%x", m_cc[(m_cpu_ir>>8)&0xf], temp_pc + make_int_16(read_imm_16()));
}
std::string m68k_disassembler::d68020_bcc_32()
{
u32 temp_pc = m_cpu_pc;
auto limit = limit_cpu_types(M68020_PLUS);
if(limit.first)
return limit.second;
m_flags = STEP_COND;
return util::string_format("b%-2s $%x; (2+)", m_cc[(m_cpu_ir>>8)&0xf], temp_pc + read_imm_32());
}
std::string m68k_disassembler::d68000_bchg_r()
{
return util::string_format("bchg D%d, %s", (m_cpu_ir>>9)&7, get_ea_mode_str_8(m_cpu_ir));
}
std::string m68k_disassembler::d68000_bchg_s()
{
std::string str = get_imm_str_u8();
return util::string_format("bchg %s, %s", str, get_ea_mode_str_8(m_cpu_ir));
}
std::string m68k_disassembler::d68000_bclr_r()
{
return util::string_format("bclr D%d, %s", (m_cpu_ir>>9)&7, get_ea_mode_str_8(m_cpu_ir));
}
std::string m68k_disassembler::d68000_bclr_s()
{
std::string str = get_imm_str_u8();
return util::string_format("bclr %s, %s", str, get_ea_mode_str_8(m_cpu_ir));
}
std::string m68k_disassembler::d68010_bkpt()
{
auto limit = limit_cpu_types(M68010_PLUS);
if(limit.first)
return limit.second;
return util::string_format("bkpt #%d; (1+)", m_cpu_ir&7);
}
std::string m68k_disassembler::d68020_bfchg()
{
auto limit = limit_cpu_types(M68020_PLUS);
if(limit.first)
return limit.second;
u16 extension = read_imm_16();
std::string offset = BIT(extension, 11) ? util::string_format("D%d", (extension>>6)&7) : util::string_format("%d", (extension>>6)&31);
std::string width = BIT(extension, 5) ? util::string_format("D%d", extension&7) : util::string_format("%d", m_5bit_data_table[extension&31]);
return util::string_format("bfchg %s {%s:%s}; (2+)", get_ea_mode_str_8(m_cpu_ir), offset, width);
}
std::string m68k_disassembler::d68020_bfclr()
{
auto limit = limit_cpu_types(M68020_PLUS);
if(limit.first)
return limit.second;
u16 extension = read_imm_16();
std::string offset = BIT(extension, 11) ? util::string_format("D%d", (extension>>6)&7) : util::string_format("%d", (extension>>6)&31);
std::string width = BIT(extension, 5) ? util::string_format("D%d", extension&7) : util::string_format("%d", m_5bit_data_table[extension&31]);
return util::string_format("bfclr %s {%s:%s}; (2+)", get_ea_mode_str_8(m_cpu_ir), offset, width);
}
std::string m68k_disassembler::d68020_bfexts()
{
auto const limit = limit_cpu_types(M68020_PLUS);
if(limit.first)
return limit.second;
u16 const extension = read_imm_16();
std::string const offset = BIT(extension, 11)
? util::string_format("D%d", (extension >> 6) & 7)
: util::string_format("%d", (extension >> 6) & 31);
std::string const width = BIT(extension, 5)
? util::string_format("D%d", extension & 7)
: util::string_format("%d", m_5bit_data_table[extension & 31]);
return util::string_format("bfexts %s {%s:%s}, D%d; (2+)", get_ea_mode_str_8(m_cpu_ir), offset, width, (extension >> 12) & 7);
}
std::string m68k_disassembler::d68020_bfextu()
{
auto const limit = limit_cpu_types(M68020_PLUS);
if(limit.first)
return limit.second;
u16 const extension = read_imm_16();
std::string const offset = BIT(extension, 11)
? util::string_format("D%d", (extension >> 6) & 7)
: util::string_format("%d", (extension >> 6) & 31);
std::string const width = BIT(extension, 5)
? util::string_format("D%d", extension & 7)
: util::string_format("%d", m_5bit_data_table[extension & 31]);
return util::string_format("bfextu %s {%s:%s}, D%d; (2+)", get_ea_mode_str_8(m_cpu_ir), offset, width, (extension >> 12) & 7);
}
std::string m68k_disassembler::d68020_bfffo()
{
auto limit = limit_cpu_types(M68020_PLUS);
if(limit.first)
return limit.second;
u16 extension = read_imm_16();
std::string offset = BIT(extension, 11) ? util::string_format("D%d", (extension>>6)&7) : util::string_format("%d", (extension>>6)&31);
std::string width = BIT(extension, 5) ? util::string_format("D%d", extension&7) : util::string_format("%d", m_5bit_data_table[extension&31]);
return util::string_format("bfffo D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(m_cpu_ir), offset, width);
}
std::string m68k_disassembler::d68020_bfins()
{
auto limit = limit_cpu_types(M68020_PLUS);
if(limit.first)
return limit.second;
u16 extension = read_imm_16();
std::string offset = BIT(extension, 11) ? util::string_format("D%d", (extension>>6)&7) : util::string_format("%d", (extension>>6)&31);
std::string width = BIT(extension, 5) ? util::string_format("D%d", extension&7) : util::string_format("%d", m_5bit_data_table[extension&31]);
return util::string_format("bfins D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(m_cpu_ir), offset, width);
}
std::string m68k_disassembler::d68020_bfset()
{
auto limit = limit_cpu_types(M68020_PLUS);
if(limit.first)
return limit.second;
u16 extension = read_imm_16();
std::string offset = BIT(extension, 11) ? util::string_format("D%d", (extension>>6)&7) : util::string_format("%d", (extension>>6)&31);
std::string width = BIT(extension, 5) ? util::string_format("D%d", extension&7) : util::string_format("%d", m_5bit_data_table[extension&31]);
return util::string_format("bfset %s {%s:%s}; (2+)", get_ea_mode_str_8(m_cpu_ir), offset, width);
}
std::string m68k_disassembler::d68020_bftst()
{
auto limit = limit_cpu_types(M68020_PLUS);
if(limit.first)
return limit.second;
u16 extension = read_imm_16();
std::string offset = BIT(extension, 11) ? util::string_format("D%d", (extension>>6)&7) : util::string_format("%d", (extension>>6)&31);
std::string width = BIT(extension, 5) ? util::string_format("D%d", extension&7) : util::string_format("%d", m_5bit_data_table[extension&31]);
return util::string_format("bftst %s {%s:%s}; (2+)", get_ea_mode_str_8(m_cpu_ir), offset, width);
}
std::string m68k_disassembler::d68000_bra_8()
{
u32 temp_pc = m_cpu_pc;
return util::string_format("bra $%x", temp_pc + make_int_8(m_cpu_ir));
}
std::string m68k_disassembler::d68000_bra_16()
{
u32 temp_pc = m_cpu_pc;
return util::string_format("bra $%x", temp_pc + make_int_16(read_imm_16()));
}
std::string m68k_disassembler::d68020_bra_32()
{
u32 temp_pc = m_cpu_pc;
auto limit = limit_cpu_types(M68020_PLUS);
if(limit.first)
return limit.second;
return util::string_format("bra $%x; (2+)", temp_pc + read_imm_32());
}
std::string m68k_disassembler::d68000_bset_r()
{
return util::string_format("bset D%d, %s", (m_cpu_ir>>9)&7, get_ea_mode_str_8(m_cpu_ir));
}
std::string m68k_disassembler::d68000_bset_s()
{
std::string str = get_imm_str_u8();
return util::string_format("bset %s, %s", str, get_ea_mode_str_8(m_cpu_ir));
}
std::string m68k_disassembler::d68000_bsr_8()
{
u32 temp_pc = m_cpu_pc;
m_flags = STEP_OVER;
return util::string_format("bsr $%x", temp_pc + make_int_8(m_cpu_ir));
}
std::string m68k_disassembler::d68000_bsr_16()
{
u32 temp_pc = m_cpu_pc;
m_flags = STEP_OVER;
return util::string_format("bsr $%x", temp_pc + make_int_16(read_imm_16()));
}
std::string m68k_disassembler::d68020_bsr_32()
{
u32 temp_pc = m_cpu_pc;
auto limit = limit_cpu_types(M68020_PLUS);
if(limit.first)
return limit.second;
m_flags = STEP_OVER;
return util::string_format("bsr $%x; (2+)", temp_pc + read_imm_32());
}
std::string m68k_disassembler::d68000_btst_r()
{
return util::string_format("btst D%d, %s", (m_cpu_ir>>9)&7, get_ea_mode_str_8(m_cpu_ir));
}
std::string m68k_disassembler::d68000_btst_s()
{
std::string str = get_imm_str_u8();
return util::string_format("btst %s, %s", str, get_ea_mode_str_8(m_cpu_ir));
}
std::string m68k_disassembler::d68020_callm()
{
auto limit = limit_cpu_types(M68020_ONLY);
if(limit.first)
return limit.second;
std::string str = get_imm_str_u8();
return util::string_format("callm %s, %s; (2)", str, get_ea_mode_str_8(m_cpu_ir));
}
std::string m68k_disassembler::d68020_cas_8()
{
auto limit = limit_cpu_types(M68020_PLUS);
if(limit.first)
return limit.second;
u16 extension = read_imm_16();
return util::string_format("cas.b D%d, D%d, %s; (2+)", extension&7, (extension>>6)&7, get_ea_mode_str_8(m_cpu_ir));
}
std::string m68k_disassembler::d68020_cas_16()
{
auto limit = limit_cpu_types(M68020_PLUS);
if(limit.first)
return limit.second;
u16 extension = read_imm_16();
return util::string_format("cas.w D%d, D%d, %s; (2+)", extension&7, (extension>>6)&7, get_ea_mode_str_16(m_cpu_ir));
}
std::string m68k_disassembler::d68020_cas_32()
{
auto limit = limit_cpu_types(M68020_PLUS);
if(limit.first)
return limit.second;
u16 extension = read_imm_16();
return util::string_format("cas.l D%d, D%d, %s; (2+)", extension&7, (extension>>6)&7, get_ea_mode_str_32(m_cpu_ir));
}
std::string m68k_disassembler::d68020_cas2_16()
{
/* CAS2 Dc1:Dc2,Du1:Dc2:(Rn1):(Rn2)
f e d c b a 9 8 7 6 5 4 3 2 1 0
DARn1 0 0 0 Du1 0 0 0 Dc1
DARn2 0 0 0 Du2 0 0 0 Dc2
*/
auto limit = limit_cpu_types(M68020_PLUS);
if(limit.first)
return limit.second;
u32 extension = read_imm_32();
return util::string_format("cas2.w D%d:D%d:D%d:D%d, (%c%d):(%c%d); (2+)",
(extension>>16)&7, extension&7, (extension>>22)&7, (extension>>6)&7,
BIT(extension, 31) ? 'A' : 'D', (extension>>28)&7,
BIT(extension, 15) ? 'A' : 'D', (extension>>12)&7);
}
std::string m68k_disassembler::d68020_cas2_32()
{
auto limit = limit_cpu_types(M68020_PLUS);
if(limit.first)
return limit.second;
u32 extension = read_imm_32();
return util::string_format("cas2.l D%d:D%d:D%d:D%d, (%c%d):(%c%d); (2+)",
(extension>>16)&7, extension&7, (extension>>22)&7, (extension>>6)&7,
BIT(extension, 31) ? 'A' : 'D', (extension>>28)&7,
BIT(extension, 15) ? 'A' : 'D', (extension>>12)&7);
}
std::string m68k_disassembler::d68000_chk_16()
{
m_flags = STEP_OVER | STEP_COND;
return util::string_format("chk.w %s, D%d", get_ea_mode_str_16(m_cpu_ir), (m_cpu_ir>>9)&7);
}
std::string m68k_disassembler::d68020_chk_32()
{
auto limit = limit_cpu_types(M68020_PLUS);
if(limit.first)
return limit.second;
m_flags = STEP_OVER | STEP_COND;
return util::string_format("chk.l %s, D%d; (2+)", get_ea_mode_str_32(m_cpu_ir), (m_cpu_ir>>9)&7);
}
std::string m68k_disassembler::d68020_chk2_cmp2_8()
{
auto limit = limit_cpu_types(M68020_PLUS);
if(limit.first)
return limit.second;
u16 extension = read_imm_16();
return util::string_format("%s.b %s, %c%d; (2+)", BIT(extension, 11) ? "chk2" : "cmp2", get_ea_mode_str_8(m_cpu_ir), BIT(extension, 15) ? 'A' : 'D', (extension>>12)&7);
}
std::string m68k_disassembler::d68020_chk2_cmp2_16()
{
auto limit = limit_cpu_types(M68020_PLUS);
if(limit.first)
return limit.second;
u16 extension = read_imm_16();
return util::string_format("%s.w %s, %c%d; (2+)", BIT(extension, 11) ? "chk2" : "cmp2", get_ea_mode_str_16(m_cpu_ir), BIT(extension, 15) ? 'A' : 'D', (extension>>12)&7);
}
std::string m68k_disassembler::d68020_chk2_cmp2_32()
{
auto limit = limit_cpu_types(M68020_PLUS);
if(limit.first)
return limit.second;
u16 extension = read_imm_16();
return util::string_format("%s.l %s, %c%d; (2+)", BIT(extension, 11) ? "chk2" : "cmp2", get_ea_mode_str_32(m_cpu_ir), BIT(extension, 15) ? 'A' : 'D', (extension>>12)&7);
}
std::string m68k_disassembler::d68040_cinv()
{
auto limit = limit_cpu_types(M68040_PLUS);
if(limit.first)
return limit.second;
static char const *const cachetype[4] = { "nop", "data", "inst", "both" };
switch((m_cpu_ir>>3)&3)
{
case 0:
return util::string_format("cinv (illegal scope); (4)");