|
| 1 | +// license:BSD-3-Clause |
| 2 | +// copyright-holders:hap |
| 3 | +// thanks-to:Berger |
| 4 | +/******************************************************************************* |
| 5 | +
|
| 6 | +Novag Sapphire |
| 7 | +
|
| 8 | +TODO: |
| 9 | +- currently hardlocks MAME, suspect problem with h8_sci |
| 10 | +- everything else |
| 11 | +
|
| 12 | +*******************************************************************************/ |
| 13 | + |
| 14 | +#include "emu.h" |
| 15 | + |
| 16 | +#include "bus/rs232/rs232.h" |
| 17 | +#include "cpu/h8/h8325.h" |
| 18 | +#include "sound/dac.h" |
| 19 | +#include "video/pwm.h" |
| 20 | + |
| 21 | +#include "screen.h" |
| 22 | +#include "speaker.h" |
| 23 | + |
| 24 | +// internal artwork |
| 25 | +//#include "novag_sapphire.lh" |
| 26 | + |
| 27 | + |
| 28 | +namespace { |
| 29 | + |
| 30 | +class sapphire_state : public driver_device |
| 31 | +{ |
| 32 | +public: |
| 33 | + sapphire_state(const machine_config &mconfig, device_type type, const char *tag) : |
| 34 | + driver_device(mconfig, type, tag), |
| 35 | + m_maincpu(*this, "maincpu"), |
| 36 | + m_memory(*this, "memory"), |
| 37 | + m_banked_ram(*this, "banked_ram", 0x20000, ENDIANNESS_BIG), |
| 38 | + m_rambank(*this, "rambank"), |
| 39 | + m_dac(*this, "dac"), |
| 40 | + m_rs232(*this, "rs232"), |
| 41 | + m_inputs(*this, "IN.%u", 0) |
| 42 | + { } |
| 43 | + |
| 44 | + void sapphire(machine_config &config); |
| 45 | + |
| 46 | +protected: |
| 47 | + virtual void machine_start() override; |
| 48 | + |
| 49 | +private: |
| 50 | + // devices/pointers |
| 51 | + required_device<h8325_device> m_maincpu; |
| 52 | + memory_view m_memory; |
| 53 | + memory_share_creator<u8> m_banked_ram; |
| 54 | + required_memory_bank m_rambank; |
| 55 | + required_device<dac_1bit_device> m_dac; |
| 56 | + required_device<rs232_port_device> m_rs232; |
| 57 | + required_ioport_array<2> m_inputs; |
| 58 | + |
| 59 | + u8 m_inp_mux = 0; |
| 60 | + |
| 61 | + void main_map(address_map &map); |
| 62 | + |
| 63 | + // I/O handlers |
| 64 | + u8 p1_r(); |
| 65 | + void p1_w(u8 data); |
| 66 | + |
| 67 | + u8 p2_r(); |
| 68 | + void p2_w(u8 data); |
| 69 | + |
| 70 | + u8 p3_r(); |
| 71 | + void p3_w(u8 data); |
| 72 | + |
| 73 | + u8 p4_r(); |
| 74 | + void p4_w(u8 data); |
| 75 | + |
| 76 | + u8 p5_r(); |
| 77 | + void p5_w(u8 data); |
| 78 | + |
| 79 | + u8 p6_r(); |
| 80 | + void p6_w(u8 data); |
| 81 | + |
| 82 | + u8 p7_r(); |
| 83 | + void p7_w(u8 data); |
| 84 | +}; |
| 85 | + |
| 86 | +void sapphire_state::machine_start() |
| 87 | +{ |
| 88 | + m_rambank->configure_entries(0, 4, m_banked_ram, 0x8000); |
| 89 | + m_memory.select(0); |
| 90 | + |
| 91 | + // register for savestates |
| 92 | + save_item(NAME(m_inp_mux)); |
| 93 | +} |
| 94 | + |
| 95 | + |
| 96 | + |
| 97 | +/******************************************************************************* |
| 98 | + I/O |
| 99 | +*******************************************************************************/ |
| 100 | + |
| 101 | +/* |
| 102 | +
|
| 103 | +[:maincpu:port1] ddr_w ff |
| 104 | +[:maincpu:port3] ddr_w ff |
| 105 | +[:maincpu:port2] ddr_w 7f |
| 106 | +[:maincpu:port4] ddr_w 3f |
| 107 | +[:maincpu:port6] ddr_w 3f |
| 108 | +
|
| 109 | +*/ |
| 110 | + |
| 111 | +u8 sapphire_state::p1_r() |
| 112 | +{ |
| 113 | + //printf("r1 "); |
| 114 | + return 0xff; |
| 115 | +} |
| 116 | + |
| 117 | +void sapphire_state::p1_w(u8 data) |
| 118 | +{ |
| 119 | + //printf("w1_%X ",data); |
| 120 | +} |
| 121 | + |
| 122 | +u8 sapphire_state::p2_r() |
| 123 | +{ |
| 124 | + //printf("r2 "); |
| 125 | + return 0xff; |
| 126 | +} |
| 127 | + |
| 128 | +void sapphire_state::p2_w(u8 data) |
| 129 | +{ |
| 130 | + //printf("w2_%X ",data); |
| 131 | +} |
| 132 | + |
| 133 | +u8 sapphire_state::p3_r() |
| 134 | +{ |
| 135 | + //printf("r3 "); |
| 136 | + return 0xff; |
| 137 | +} |
| 138 | + |
| 139 | +void sapphire_state::p3_w(u8 data) |
| 140 | +{ |
| 141 | + //printf("w3_%X ",data); |
| 142 | +} |
| 143 | + |
| 144 | +u8 sapphire_state::p4_r() |
| 145 | +{ |
| 146 | + //printf("r4 "); |
| 147 | + return 0xff ^ 0xc0; |
| 148 | +} |
| 149 | + |
| 150 | +void sapphire_state::p4_w(u8 data) |
| 151 | +{ |
| 152 | + //printf("w4_%X ",data); |
| 153 | + |
| 154 | + // P40: speaker out |
| 155 | + m_dac->write(data & 1); |
| 156 | + |
| 157 | + // P41,P42: RAM bank |
| 158 | + m_rambank->set_entry(data >> 1 & 3); |
| 159 | +} |
| 160 | + |
| 161 | +u8 sapphire_state::p5_r() |
| 162 | +{ |
| 163 | + //printf("r5 "); |
| 164 | + return 0xff; |
| 165 | +} |
| 166 | + |
| 167 | +void sapphire_state::p5_w(u8 data) |
| 168 | +{ |
| 169 | + //printf("w5_%X ",data); |
| 170 | +} |
| 171 | + |
| 172 | +u8 sapphire_state::p6_r() |
| 173 | +{ |
| 174 | + //printf("r6 "); |
| 175 | + return 0xff ^ 0x40; |
| 176 | +} |
| 177 | + |
| 178 | +void sapphire_state::p6_w(u8 data) |
| 179 | +{ |
| 180 | + //printf("w6_%X ",data); |
| 181 | + |
| 182 | + // P63: RAM/ROM CS |
| 183 | + m_memory.select(BIT(data, 3)); |
| 184 | +} |
| 185 | + |
| 186 | +u8 sapphire_state::p7_r() |
| 187 | +{ |
| 188 | + //printf("r7 "); |
| 189 | + return 0xff; |
| 190 | +} |
| 191 | + |
| 192 | +void sapphire_state::p7_w(u8 data) |
| 193 | +{ |
| 194 | + //printf("w7_%X ",data); |
| 195 | +} |
| 196 | + |
| 197 | + |
| 198 | + |
| 199 | +/******************************************************************************* |
| 200 | + Address Maps |
| 201 | +*******************************************************************************/ |
| 202 | + |
| 203 | +void sapphire_state::main_map(address_map &map) |
| 204 | +{ |
| 205 | + map(0x8000, 0xffff).view(m_memory); |
| 206 | + m_memory[0](0x8000, 0xffff).rom().region("maincpu", 0x8000); |
| 207 | + m_memory[1](0x8000, 0xffff).bankrw(m_rambank); |
| 208 | + |
| 209 | + map(0xff90, 0xff9f).unmaprw(); // reserved for H8 registers |
| 210 | + map(0xffb0, 0xffff).unmaprw(); // " |
| 211 | +} |
| 212 | + |
| 213 | + |
| 214 | + |
| 215 | +/******************************************************************************* |
| 216 | + Input Ports |
| 217 | +*******************************************************************************/ |
| 218 | + |
| 219 | +static INPUT_PORTS_START( sapphire ) |
| 220 | + PORT_START("IN.0") |
| 221 | + PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_1) |
| 222 | + PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_2) |
| 223 | + PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_3) |
| 224 | + PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_4) |
| 225 | + PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_5) |
| 226 | + PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_6) |
| 227 | + PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_7) |
| 228 | + PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_8) |
| 229 | + |
| 230 | + PORT_START("IN.1") |
| 231 | + PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_Q) |
| 232 | + PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_W) |
| 233 | + PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_E) |
| 234 | + PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_R) |
| 235 | + PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_T) |
| 236 | + PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_Y) |
| 237 | + PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_U) |
| 238 | + PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_I) |
| 239 | +INPUT_PORTS_END |
| 240 | + |
| 241 | + |
| 242 | + |
| 243 | +/******************************************************************************* |
| 244 | + Machine Configs |
| 245 | +*******************************************************************************/ |
| 246 | + |
| 247 | +void sapphire_state::sapphire(machine_config &config) |
| 248 | +{ |
| 249 | + // basic machine hardware |
| 250 | + H8325(config, m_maincpu, 26.601712_MHz_XTAL); |
| 251 | + m_maincpu->set_mode(2); |
| 252 | + m_maincpu->set_addrmap(AS_PROGRAM, &sapphire_state::main_map); |
| 253 | + m_maincpu->write_sci_tx<0>().set(m_rs232, FUNC(rs232_port_device::write_txd)); |
| 254 | + |
| 255 | + m_maincpu->read_port1().set(FUNC(sapphire_state::p1_r)); |
| 256 | + m_maincpu->write_port1().set(FUNC(sapphire_state::p1_w)); |
| 257 | + |
| 258 | + m_maincpu->read_port2().set(FUNC(sapphire_state::p2_r)); |
| 259 | + m_maincpu->write_port2().set(FUNC(sapphire_state::p2_w)); |
| 260 | + |
| 261 | + m_maincpu->read_port3().set(FUNC(sapphire_state::p3_r)); |
| 262 | + m_maincpu->write_port3().set(FUNC(sapphire_state::p3_w)); |
| 263 | + |
| 264 | + m_maincpu->read_port4().set(FUNC(sapphire_state::p4_r)); |
| 265 | + m_maincpu->write_port4().set(FUNC(sapphire_state::p4_w)); |
| 266 | + |
| 267 | + m_maincpu->read_port5().set(FUNC(sapphire_state::p5_r)); |
| 268 | + m_maincpu->write_port5().set(FUNC(sapphire_state::p5_w)); |
| 269 | + |
| 270 | + m_maincpu->read_port6().set(FUNC(sapphire_state::p6_r)); |
| 271 | + m_maincpu->write_port6().set(FUNC(sapphire_state::p6_w)); |
| 272 | + |
| 273 | + m_maincpu->read_port7().set(FUNC(sapphire_state::p7_r)); |
| 274 | + m_maincpu->write_port7().set(FUNC(sapphire_state::p7_w)); |
| 275 | + |
| 276 | + // video hardware |
| 277 | + //PWM_DISPLAY(config, m_lcd_pwm).set_size(4, 10); |
| 278 | + //m_lcd_pwm->output_x().set(FUNC(sapphire_state::lcd_pwm_w)); |
| 279 | + |
| 280 | + //screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_SVG)); |
| 281 | + //screen.set_refresh_hz(60); |
| 282 | + //screen.set_size(1920/2.5, 606/2.5); |
| 283 | + //screen.set_visarea_full(); |
| 284 | + |
| 285 | + //config.set_default_layout(layout_novag_sapphire); |
| 286 | + |
| 287 | + // rs232 (configure after video) |
| 288 | + RS232_PORT(config, m_rs232, default_rs232_devices, nullptr); |
| 289 | + m_rs232->rxd_handler().set(m_maincpu, FUNC(h8325_device::sci_rx_w<0>)); |
| 290 | + |
| 291 | + // sound hardware |
| 292 | + SPEAKER(config, "speaker").front_center(); |
| 293 | + DAC_1BIT(config, m_dac).add_route(ALL_OUTPUTS, "speaker", 0.25); |
| 294 | +} |
| 295 | + |
| 296 | + |
| 297 | + |
| 298 | +/******************************************************************************* |
| 299 | + ROM Definitions |
| 300 | +*******************************************************************************/ |
| 301 | + |
| 302 | +ROM_START( sapphire ) |
| 303 | + ROM_REGION16_BE( 0x10000, "maincpu", 0 ) |
| 304 | + ROM_LOAD("novag_9304-010053_6433258b46f.u1", 0x0000, 0x8000, CRC(bfc39f4b) SHA1(dc96440c070e903772f4485757443dd690e92120) ) |
| 305 | + ROM_LOAD("bk301_26601.u2", 0x8000, 0x8000, CRC(648ebe8f) SHA1(2883f962a0bf17426fd809b9f2c01ce3dec0df1b) ) |
| 306 | + |
| 307 | + ROM_REGION( 36256, "screen", 0 ) |
| 308 | + ROM_LOAD("nvip.svg", 0, 36256, CRC(3373e0d5) SHA1(25bfbf0405017388c30f4529106baccb4723bc6b) ) |
| 309 | +ROM_END |
| 310 | + |
| 311 | +} // anonymous namespace |
| 312 | + |
| 313 | + |
| 314 | + |
| 315 | +/******************************************************************************* |
| 316 | + Drivers |
| 317 | +*******************************************************************************/ |
| 318 | + |
| 319 | +// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY, FULLNAME, FLAGS |
| 320 | +SYST( 1994, sapphire, 0, 0, sapphire, sapphire, sapphire_state, empty_init, "Novag Industries", "Sapphire (Novag)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) |
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