@@ -113,27 +113,27 @@ enum
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struct n64_tile_t
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{
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- int32_t format; // Image data format: RGBA, YUV, CI, IA, I
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- int32_t size; // Size of texel element: 4b, 8b, 16b, 32b
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- int32_t line; // Size of tile line in bytes
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- int32_t tmem; // Starting tmem address for this tile in bytes
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- int32_t palette; // Palette number for 4b CI texels
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- int32_t ct, mt, cs, ms; // Clamp / mirror enable bits for S / T direction
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- int32_t mask_t , shift_t , mask_s, shift_s; // Mask values / LOD shifts
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- int32_t lshift_s, rshift_s, lshift_t , rshift_t ;
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- int32_t wrapped_mask_s, wrapped_mask_t ;
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- bool clamp_s, clamp_t ;
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- rgbaint_t mm, invmm;
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- rgbaint_t wrapped_mask;
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- rgbaint_t mask;
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- rgbaint_t invmask;
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- rgbaint_t lshift;
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- rgbaint_t rshift;
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- rgbaint_t sth;
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- rgbaint_t stl;
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- rgbaint_t clamp_st;
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- uint16_t sl, tl, sh, th; // 10.2 fixed-point, starting and ending texel row / column
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- int32_t num;
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+ int32_t format = 0 ; // Image data format: RGBA, YUV, CI, IA, I
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+ int32_t size = 0 ; // Size of texel element: 4b, 8b, 16b, 32b
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+ int32_t line = 0 ; // Size of tile line in bytes
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+ int32_t tmem = 0 ; // Starting tmem address for this tile in bytes
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+ int32_t palette = 0 ; // Palette number for 4b CI texels
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+ int32_t ct = 0 , mt = 0 , cs = 0 , ms = 0 ; // Clamp / mirror enable bits for S / T direction
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+ int32_t mask_t = 0 , shift_t = 0 , mask_s = 0 , shift_s = 0 ; // Mask values / LOD shifts
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+ int32_t lshift_s = 0 , rshift_s = 0 , lshift_t = 0 , rshift_t = 0 ;
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+ int32_t wrapped_mask_s = 0 , wrapped_mask_t = 0 ;
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+ bool clamp_s = false , clamp_t = false ;
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+ rgbaint_t mm = { 0 , 0 , 0 , 0 }, invmm = { 0 , 0 , 0 , 0 } ;
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+ rgbaint_t wrapped_mask = { 0 , 0 , 0 , 0 } ;
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+ rgbaint_t mask = { 0 , 0 , 0 , 0 } ;
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+ rgbaint_t invmask = { 0 , 0 , 0 , 0 } ;
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+ rgbaint_t lshift = { 0 , 0 , 0 , 0 } ;
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+ rgbaint_t rshift = { 0 , 0 , 0 , 0 } ;
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+ rgbaint_t sth = { 0 , 0 , 0 , 0 } ;
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+ rgbaint_t stl = { 0 , 0 , 0 , 0 } ;
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+ rgbaint_t clamp_st = { 0 , 0 , 0 , 0 } ;
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+ uint16_t sl = 0 , tl = 0 , sh = 0 , th = 0 ; // 10.2 fixed-point, starting and ending texel row / column
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+ int32_t num = 0 ;
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};
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struct span_base_t
@@ -255,10 +255,10 @@ struct rdp_poly_state
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other_modes_t m_other_modes; /* miscellaneous rasterizer bits (2) */
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span_base_t m_span_base; /* span initial values for triangle rasterization */
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rectangle_t m_scissor; /* screen-space scissor bounds */
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- uint32_t m_fill_color; /* poly fill color */
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+ uint32_t m_fill_color; /* poly fill color */
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n64_tile_t m_tiles[8 ]; /* texture tile state */
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- uint8_t m_tmem[0x1000 ]; /* texture cache */
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- int32_t tilenum; /* texture tile index */
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+ uint8_t m_tmem[0x1000 ]; /* texture cache */
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+ int32_t tilenum; /* texture tile index */
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bool flip; /* left-major / right-major flip */
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bool rect; /* primitive is rectangle (vs. triangle) */
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};
@@ -268,8 +268,8 @@ struct rdp_poly_state
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// This is enormous and horrible
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struct rdp_span_aux
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{
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- uint32_t m_unscissored_rx;
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- uint16_t m_cvg[RDP_CVG_SPAN_MAX];
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+ uint32_t m_unscissored_rx;
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+ uint16_t m_cvg[RDP_CVG_SPAN_MAX];
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color_t m_memory_color;
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color_t m_pixel_color;
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color_t m_inv_pixel_color;
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