@@ -19,7 +19,7 @@ DEFINE_DEVICE_TYPE(MSM66573, msm66573_device, "msm66573", "Oki MSM66573")
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msm665xx_device::msm665xx_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor mem_map, address_map_constructor data_map)
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: cpu_device(mconfig, type, tag, owner, clock)
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, m_program_config(" program" , ENDIANNESS_LITTLE, 8 , 20 , 0 , mem_map)
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- , m_data_config(" iram " , ENDIANNESS_LITTLE, 16 , 20 , 0 , data_map)
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+ , m_data_config(" data " , ENDIANNESS_LITTLE, 16 , 20 , 0 , data_map)
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, m_acc(0 )
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, m_pc(0 )
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, m_ppc(0 )
@@ -30,6 +30,7 @@ msm665xx_device::msm665xx_device(const machine_config &mconfig, device_type type
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, m_dsr(0 )
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, m_tsr(0 )
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, m_romwin(0x30 )
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+ , m_memscon(0 )
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, m_icount(0 )
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{
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}
@@ -64,6 +65,8 @@ void msm66573_device::data_map(address_map &map)
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map (0x00008 , 0x00008 ).rw (FUNC (msm66573_device::tsr_r), FUNC (msm66573_device::tsr_w));
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map (0x00009 , 0x00009 ).rw (FUNC (msm66573_device::dsr_r), FUNC (msm66573_device::dsr_w));
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map (0x0000b , 0x0000b ).rw (FUNC (msm66573_device::romwin_r), FUNC (msm66573_device::romwin_w));
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+ map (0x00010 , 0x00010 ).w (FUNC (msm66573_device::memsacp_w));
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+ map (0x00011 , 0x00011 ).rw (FUNC (msm66573_device::memscon_r), FUNC (msm66573_device::memscon_w));
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// TODO: many, many other SFRs
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map (0x00200 , 0x011ff ).ram ().share (" internal" );
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}
@@ -90,7 +93,7 @@ void msm665xx_device::device_start()
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[this ](u32 data) { m_csr = (data >> 16 ) & 0x0f ; m_pc = data & 0xffff ; m_ppc = data & 0xfffff ; }
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).mask (0xfffff ).noshow ();
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state_add (MSM665XX_PSW, " PSW" , m_psw);
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- // state_add(STATE_GENFLAGS, "FLAGS", m_psw).formatstr("%9s ").noshow(); // TODO
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+ state_add (STATE_GENFLAGS, " FLAGS" , m_psw).formatstr (" %8s " ).noshow ();
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state_add (MSM665XX_LRB, " LRB" , m_lrb);
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state_add (MSM665XX_SSP, " SSP" , m_ssp);
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u16 *fixed = static_cast <u16 *>(memshare (" internal" )->ptr ());
@@ -99,6 +102,8 @@ void msm665xx_device::device_start()
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[this , fixed, n]() { return fixed[(m_psw & 0x07 ) << 2 | n]; },
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[this , fixed, n](u16 data) { fixed[(m_psw & 0x07 ) << 2 | n] = data; }
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);
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+ // NOTE: This assumes internal RAM is large enough (≥2KB) to provide all 256 register banks.
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+ // While most nX-8/500S MCUs have that much internal RAM, ML66514 has only 1KB.
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for (int n = 0 ; n < 4 ; n++)
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state_add<u16 >(MSM665XX_ER0 + n, util::string_format (" ER%d" , n).c_str (),
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[this , fixed, n]() { return fixed[(m_lrb & 0x00ff ) << 2 | n]; },
@@ -113,6 +118,7 @@ void msm665xx_device::device_start()
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state_add (MSM665XX_DSR, " DSR" , m_dsr).mask (0x0f );
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state_add (MSM665XX_TSR, " TSR" , m_tsr).mask (0x0f );
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state_add (MSM665XX_ROMWIN, " ROMWIN" , m_romwin);
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+ state_add (MSM665XX_MEMSCON, " MEMSCON" , m_memscon).mask (0x03 );
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// save state
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save_item (NAME (m_acc));
@@ -136,6 +142,7 @@ void msm665xx_device::device_reset()
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m_csr = 0 ;
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m_dsr = 0 ;
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m_tsr = 0 ;
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+ m_memscon = 0 ;
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}
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@@ -186,6 +193,8 @@ u8 msm665xx_device::dsr_r()
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void msm665xx_device::dsr_w (u8 data)
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{
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+ if (!BIT (m_memscon, 0 ))
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+ logerror (" %02X:%04X: Writing %02X to DSR without data memory space expansion\n " , m_csr, m_pc, data);
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m_dsr = data & 0x0f ;
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}
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@@ -196,6 +205,8 @@ u8 msm665xx_device::tsr_r()
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void msm665xx_device::tsr_w (u8 data)
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{
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+ if (!BIT (m_memscon, 1 ))
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+ logerror (" %02X:%04X: Writing %02X to TSR without program memory space expansion\n " , m_csr, m_pc, data);
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m_tsr = data & 0x0f ;
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}
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@@ -210,6 +221,22 @@ void msm665xx_device::romwin_w(u8 data)
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m_romwin = data | 0x30 ;
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}
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+ void msm665xx_device::memsacp_w (u8 data)
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+ {
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+ logerror (" %02X:%04X: Writing %02X to MEMSCAP\n " , m_csr, m_pc, data);
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+ }
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+
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+ u8 msm665xx_device::memscon_r ()
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+ {
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+ return m_memscon | 0xfc ;
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+ }
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+
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+ void msm665xx_device::memscon_w (u8 data)
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+ {
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+ // FIXME: may be written only once after reset after double write to MEMSACP
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+ m_memscon = data & 0x03 ;
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+ }
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+
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void msm665xx_device::execute_run ()
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{
@@ -227,7 +254,15 @@ void msm665xx_device::state_string_export(const device_state_entry &entry, std::
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switch (entry.index ())
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{
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case STATE_GENFLAGS:
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- // TODO
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+ str = util::string_format (" %c%c%c%c%c%c%c%c" ,
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+ BIT (m_psw, 15 ) ? ' C' : ' .' ,
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+ BIT (m_psw, 14 ) ? ' Z' : ' .' ,
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+ BIT (m_psw, 13 ) ? ' H' : ' .' ,
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+ BIT (m_psw, 12 ) ? ' D' : ' .' ,
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+ BIT (m_psw, 11 ) ? ' S' : ' .' ,
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+ BIT (m_psw, 10 ) ? ' P' : ' .' ,
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+ BIT (m_psw, 9 ) ? ' V' : ' .' ,
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+ BIT (m_psw, 8 ) ? ' I' : ' .' );
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break ;
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}
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}
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