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msm665xx: Minor register update
1 parent 4358422 commit 5eb6183

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2 files changed

+43
-4
lines changed

2 files changed

+43
-4
lines changed

src/devices/cpu/olms66k/msm665xx.cpp

Lines changed: 38 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@ DEFINE_DEVICE_TYPE(MSM66573, msm66573_device, "msm66573", "Oki MSM66573")
1919
msm665xx_device::msm665xx_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor mem_map, address_map_constructor data_map)
2020
: cpu_device(mconfig, type, tag, owner, clock)
2121
, m_program_config("program", ENDIANNESS_LITTLE, 8, 20, 0, mem_map)
22-
, m_data_config("iram", ENDIANNESS_LITTLE, 16, 20, 0, data_map)
22+
, m_data_config("data", ENDIANNESS_LITTLE, 16, 20, 0, data_map)
2323
, m_acc(0)
2424
, m_pc(0)
2525
, m_ppc(0)
@@ -30,6 +30,7 @@ msm665xx_device::msm665xx_device(const machine_config &mconfig, device_type type
3030
, m_dsr(0)
3131
, m_tsr(0)
3232
, m_romwin(0x30)
33+
, m_memscon(0)
3334
, m_icount(0)
3435
{
3536
}
@@ -64,6 +65,8 @@ void msm66573_device::data_map(address_map &map)
6465
map(0x00008, 0x00008).rw(FUNC(msm66573_device::tsr_r), FUNC(msm66573_device::tsr_w));
6566
map(0x00009, 0x00009).rw(FUNC(msm66573_device::dsr_r), FUNC(msm66573_device::dsr_w));
6667
map(0x0000b, 0x0000b).rw(FUNC(msm66573_device::romwin_r), FUNC(msm66573_device::romwin_w));
68+
map(0x00010, 0x00010).w(FUNC(msm66573_device::memsacp_w));
69+
map(0x00011, 0x00011).rw(FUNC(msm66573_device::memscon_r), FUNC(msm66573_device::memscon_w));
6770
// TODO: many, many other SFRs
6871
map(0x00200, 0x011ff).ram().share("internal");
6972
}
@@ -90,7 +93,7 @@ void msm665xx_device::device_start()
9093
[this](u32 data) { m_csr = (data >> 16) & 0x0f; m_pc = data & 0xffff; m_ppc = data & 0xfffff; }
9194
).mask(0xfffff).noshow();
9295
state_add(MSM665XX_PSW, "PSW", m_psw);
93-
//state_add(STATE_GENFLAGS, "FLAGS", m_psw).formatstr("%9s").noshow(); // TODO
96+
state_add(STATE_GENFLAGS, "FLAGS", m_psw).formatstr("%8s").noshow();
9497
state_add(MSM665XX_LRB, "LRB", m_lrb);
9598
state_add(MSM665XX_SSP, "SSP", m_ssp);
9699
u16 *fixed = static_cast<u16 *>(memshare("internal")->ptr());
@@ -99,6 +102,8 @@ void msm665xx_device::device_start()
99102
[this, fixed, n]() { return fixed[(m_psw & 0x07) << 2 | n]; },
100103
[this, fixed, n](u16 data) { fixed[(m_psw & 0x07) << 2 | n] = data; }
101104
);
105+
// NOTE: This assumes internal RAM is large enough (≥2KB) to provide all 256 register banks.
106+
// While most nX-8/500S MCUs have that much internal RAM, ML66514 has only 1KB.
102107
for (int n = 0; n < 4; n++)
103108
state_add<u16>(MSM665XX_ER0 + n, util::string_format("ER%d", n).c_str(),
104109
[this, fixed, n]() { return fixed[(m_lrb & 0x00ff) << 2 | n]; },
@@ -113,6 +118,7 @@ void msm665xx_device::device_start()
113118
state_add(MSM665XX_DSR, "DSR", m_dsr).mask(0x0f);
114119
state_add(MSM665XX_TSR, "TSR", m_tsr).mask(0x0f);
115120
state_add(MSM665XX_ROMWIN, "ROMWIN", m_romwin);
121+
state_add(MSM665XX_MEMSCON, "MEMSCON", m_memscon).mask(0x03);
116122

117123
// save state
118124
save_item(NAME(m_acc));
@@ -136,6 +142,7 @@ void msm665xx_device::device_reset()
136142
m_csr = 0;
137143
m_dsr = 0;
138144
m_tsr = 0;
145+
m_memscon = 0;
139146
}
140147

141148

@@ -186,6 +193,8 @@ u8 msm665xx_device::dsr_r()
186193

187194
void msm665xx_device::dsr_w(u8 data)
188195
{
196+
if (!BIT(m_memscon, 0))
197+
logerror("%02X:%04X: Writing %02X to DSR without data memory space expansion\n", m_csr, m_pc, data);
189198
m_dsr = data & 0x0f;
190199
}
191200

@@ -196,6 +205,8 @@ u8 msm665xx_device::tsr_r()
196205

197206
void msm665xx_device::tsr_w(u8 data)
198207
{
208+
if (!BIT(m_memscon, 1))
209+
logerror("%02X:%04X: Writing %02X to TSR without program memory space expansion\n", m_csr, m_pc, data);
199210
m_tsr = data & 0x0f;
200211
}
201212

@@ -210,6 +221,22 @@ void msm665xx_device::romwin_w(u8 data)
210221
m_romwin = data | 0x30;
211222
}
212223

224+
void msm665xx_device::memsacp_w(u8 data)
225+
{
226+
logerror("%02X:%04X: Writing %02X to MEMSCAP\n", m_csr, m_pc, data);
227+
}
228+
229+
u8 msm665xx_device::memscon_r()
230+
{
231+
return m_memscon | 0xfc;
232+
}
233+
234+
void msm665xx_device::memscon_w(u8 data)
235+
{
236+
// FIXME: may be written only once after reset after double write to MEMSACP
237+
m_memscon = data & 0x03;
238+
}
239+
213240

214241
void msm665xx_device::execute_run()
215242
{
@@ -227,7 +254,15 @@ void msm665xx_device::state_string_export(const device_state_entry &entry, std::
227254
switch (entry.index())
228255
{
229256
case STATE_GENFLAGS:
230-
// TODO
257+
str = util::string_format("%c%c%c%c%c%c%c%c",
258+
BIT(m_psw, 15) ? 'C' : '.',
259+
BIT(m_psw, 14) ? 'Z' : '.',
260+
BIT(m_psw, 13) ? 'H' : '.',
261+
BIT(m_psw, 12) ? 'D' : '.',
262+
BIT(m_psw, 11) ? 'S' : '.',
263+
BIT(m_psw, 10) ? 'P' : '.',
264+
BIT(m_psw, 9) ? 'V' : '.',
265+
BIT(m_psw, 8) ? 'I' : '.');
231266
break;
232267
}
233268
}

src/devices/cpu/olms66k/msm665xx.h

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,7 @@ class msm665xx_device : public cpu_device
2525
MSM665XX_R0, MSM665XX_R1, MSM665XX_R2, MSM665XX_R3,
2626
MSM665XX_R4, MSM665XX_R5, MSM665XX_R6, MSM665XX_R7,
2727
MSM665XX_CSR, MSM665XX_DSR, MSM665XX_TSR,
28-
MSM665XX_ROMWIN
28+
MSM665XX_ROMWIN, MSM665XX_MEMSCON
2929
};
3030

3131
// TODO: port callbacks
@@ -58,6 +58,9 @@ class msm665xx_device : public cpu_device
5858
void tsr_w(u8 data);
5959
u8 romwin_r();
6060
void romwin_w(u8 data);
61+
void memsacp_w(u8 data);
62+
u8 memscon_r();
63+
void memscon_w(u8 data);
6164

6265
private:
6366
address_space_config m_program_config;
@@ -77,6 +80,7 @@ class msm665xx_device : public cpu_device
7780
u8 m_dsr;
7881
u8 m_tsr;
7982
u8 m_romwin;
83+
u8 m_memscon;
8084
s32 m_icount;
8185
};
8286

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