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mm1,mephisto3: reorder parent/clones
New working clones ------------------ Mephisto II (set 3) [Berger] Mephisto ESB II (ESB II board) [hap, Berger]
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4 files changed

+155
-82
lines changed

4 files changed

+155
-82
lines changed

src/mame/apple/apple2gs.cpp

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -839,11 +839,11 @@ void apple2gs_state::machine_reset()
839839
m_ramrd = false;
840840
m_ramwrt = false;
841841
m_ioudis = true;
842-
m_video->set_newvideo(0x01); // verified on ROM03 hardware
842+
m_video->set_newvideo(0x01); // verified on ROM03 hardware
843843
m_clock_frame = 0;
844844
m_slot_irq = false;
845845
m_clkdata = 0;
846-
m_clock_control =0;
846+
m_clock_control = 0;
847847

848848
m_shadow = 0x00;
849849
m_speed = 0x80;
@@ -1214,20 +1214,20 @@ void apple2gs_state::lc_update(int offset, bool writing)
12141214
{
12151215
bool old_lcram = m_lcram;
12161216

1217-
//any even access disables pre-write and writing
1217+
// any even access disables pre-write and writing
12181218
if ((offset & 1) == 0)
12191219
{
12201220
m_lcprewrite = false;
12211221
m_lcwriteenable = false;
12221222
}
12231223

1224-
//any write disables pre-write
1225-
//has no effect on write-enable if writing was enabled already
1224+
// any write disables pre-write
1225+
// has no effect on write-enable if writing was enabled already
12261226
if (writing == true)
12271227
{
12281228
m_lcprewrite = false;
12291229
}
1230-
//first odd read enables pre-write, second one enables writing
1230+
// first odd read enables pre-write, second one enables writing
12311231
else if ((offset & 1) == 1)
12321232
{
12331233
if (m_lcprewrite == false)
@@ -1315,7 +1315,7 @@ void apple2gs_state::do_io(int offset)
13151315
case 0x20:
13161316
break;
13171317

1318-
case 0x28: // ROMSWITCH - not used by the IIgs firmware or SSW, but does exist at least on ROM 0/1 (need to test on ROM 3 hw)
1318+
case 0x28: // ROMSWITCH - not used by the IIgs firmware or SSW, but does exist at least on ROM 0/1 (need to test on ROM 3 hw)
13191319
if (!m_is_rom3)
13201320
{
13211321
m_romswitch = !m_romswitch;
@@ -2226,7 +2226,7 @@ u8 apple2gs_state::c080_r(offs_t offset)
22262226

22272227
slow_cycle();
22282228

2229-
offset &= 0x7F;
2229+
offset &= 0x7f;
22302230
slot = offset / 0x10;
22312231

22322232
if (slot == 0)
@@ -2281,7 +2281,7 @@ void apple2gs_state::c080_w(offs_t offset, u8 data)
22812281

22822282
slow_cycle();
22832283

2284-
offset &= 0x7F;
2284+
offset &= 0x7f;
22852285
slot = offset / 0x10;
22862286

22872287
if (slot == 0)
@@ -3177,8 +3177,8 @@ void apple2gs_state::apple2gs_map(address_map &map)
31773177

31783178
map(0x000400, 0x0007ff).view(m_b0_0400bank);
31793179
m_b0_0400bank[0](0x0400, 0x07ff).rw(FUNC(apple2gs_state::b0ram0400_r), FUNC(apple2gs_state::b0ram0400_w)); // wr 0 rd 0
3180-
m_b0_0400bank[1](0x0400, 0x07ff).rw(FUNC(apple2gs_state::b1ram0400_r), FUNC(apple2gs_state::b0ram0400_w)); // wr 0 rd 1
3181-
m_b0_0400bank[2](0x0400, 0x07ff).rw(FUNC(apple2gs_state::b0ram0400_r), FUNC(apple2gs_state::b1ram0400_w)); // wr 1 rd 0
3180+
m_b0_0400bank[1](0x0400, 0x07ff).rw(FUNC(apple2gs_state::b1ram0400_r), FUNC(apple2gs_state::b0ram0400_w)); // wr 0 rd 1
3181+
m_b0_0400bank[2](0x0400, 0x07ff).rw(FUNC(apple2gs_state::b0ram0400_r), FUNC(apple2gs_state::b1ram0400_w)); // wr 1 rd 0
31823182
m_b0_0400bank[3](0x0400, 0x07ff).rw(FUNC(apple2gs_state::b1ram0400_r), FUNC(apple2gs_state::b1ram0400_w)); // wr 1 rd 1
31833183

31843184
map(0x000800, 0x001fff).view(m_b0_0800bank);
@@ -4025,11 +4025,11 @@ ROM_END
40254025
} // Anonymous namespace
40264026

40274027

4028-
/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME */
4028+
/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME */
40294029
COMP( 1989, apple2gs, 0, apple2, apple2gs, apple2gsrom3, apple2gs_state, rom3_init, "Apple Computer", "Apple IIgs (ROM03)", MACHINE_SUPPORTS_SAVE )
40304030
COMP( 198?, apple2gsr3p, apple2gs, 0, apple2gs, apple2gsrom3, apple2gs_state, rom3_init, "Apple Computer", "Apple IIgs (ROM03 prototype)", MACHINE_NOT_WORKING )
4031-
COMP( 1987, apple2gsr1, apple2gs, 0, apple2gsr1, apple2gs, apple2gs_state, rom1_init, "Apple Computer", "Apple IIgs (ROM01)", MACHINE_SUPPORTS_SAVE )
4032-
COMP( 1986, apple2gsr0, apple2gs, 0, apple2gsr1, apple2gs, apple2gs_state, rom1_init, "Apple Computer", "Apple IIgs (ROM00)", MACHINE_SUPPORTS_SAVE )
4033-
COMP( 1986, apple2gsr0p, apple2gs, 0, apple2gsr1, apple2gs, apple2gs_state, rom1_init, "Apple Computer", "Apple IIgs (ROM00 prototype 6/19/1986)", MACHINE_SUPPORTS_SAVE )
4034-
COMP( 1986, apple2gsr0p2, apple2gs, 0, apple2gsr1, apple2gs, apple2gs_state, rom1_init, "Apple Computer", "Apple IIgs (ROM00 prototype 3/10/1986)", MACHINE_SUPPORTS_SAVE )
4031+
COMP( 1987, apple2gsr1, apple2gs, 0, apple2gsr1, apple2gs, apple2gs_state, rom1_init, "Apple Computer", "Apple IIgs (ROM01)", MACHINE_SUPPORTS_SAVE )
4032+
COMP( 1986, apple2gsr0, apple2gs, 0, apple2gsr1, apple2gs, apple2gs_state, rom1_init, "Apple Computer", "Apple IIgs (ROM00)", MACHINE_SUPPORTS_SAVE )
4033+
COMP( 1986, apple2gsr0p, apple2gs, 0, apple2gsr1, apple2gs, apple2gs_state, rom1_init, "Apple Computer", "Apple IIgs (ROM00 prototype 6/19/1986)", MACHINE_SUPPORTS_SAVE )
4034+
COMP( 1986, apple2gsr0p2, apple2gs, 0, apple2gsr1, apple2gs, apple2gs_state, rom1_init, "Apple Computer", "Apple IIgs (ROM00 prototype 3/10/1986)", MACHINE_SUPPORTS_SAVE )
40354035
COMP( 1991, apple2gsmt, apple2gs, 0, apple2gsmt, apple2gsrom3, apple2gs_state, rom3_init, "Apple Computer", "Apple IIgs (1991 Mark Twain prototype)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE )

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