|
| 1 | +// license:BSD-3-Clause |
| 2 | +// copyright-holders:Fabio Priuli, Angelo Salese |
| 3 | +/*********************************************************************************************************** |
| 4 | +
|
| 5 | +
|
| 6 | + PC-Engine Arcade Card emulation |
| 7 | +
|
| 8 | + TODO: |
| 9 | + - Proper Arcade Card Duo support |
| 10 | +
|
| 11 | + ***********************************************************************************************************/ |
| 12 | + |
| 13 | + |
| 14 | +#include "emu.h" |
| 15 | +#include "pce_acard.h" |
| 16 | + |
| 17 | + |
| 18 | + |
| 19 | +//------------------------------------------------- |
| 20 | +// pce_acard_device - constructor |
| 21 | +//------------------------------------------------- |
| 22 | + |
| 23 | +DEFINE_DEVICE_TYPE(PCE_ROM_ACARD_DUO, pce_acard_duo_device, "pce_acard_duo", "Arcade Card Duo") |
| 24 | +DEFINE_DEVICE_TYPE(PCE_ROM_ACARD_PRO, pce_acard_pro_device, "pce_acard_pro", "Arcade Card Pro") |
| 25 | + |
| 26 | + |
| 27 | +pce_acard_duo_device::pce_acard_duo_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) |
| 28 | + : device_t(mconfig, type, tag, owner, clock) |
| 29 | + , device_pce_cart_interface( mconfig, *this ) |
| 30 | + , m_ram(*this, "ram", 0x200000, ENDIANNESS_LITTLE) |
| 31 | + , m_shift(0) |
| 32 | + , m_shift_reg(0) |
| 33 | + , m_rotate_reg(0) |
| 34 | +{ |
| 35 | +} |
| 36 | + |
| 37 | +pce_acard_duo_device::pce_acard_duo_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) |
| 38 | + : pce_acard_duo_device(mconfig, PCE_ROM_ACARD_DUO, tag, owner, clock) |
| 39 | +{ |
| 40 | +} |
| 41 | + |
| 42 | +pce_acard_pro_device::pce_acard_pro_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) |
| 43 | + : pce_acard_duo_device(mconfig, PCE_ROM_ACARD_PRO, tag, owner, clock) |
| 44 | + , m_scdsys() |
| 45 | +{ |
| 46 | +} |
| 47 | + |
| 48 | + |
| 49 | +//------------------------------------------------- |
| 50 | +// mapper specific start/reset |
| 51 | +//------------------------------------------------- |
| 52 | + |
| 53 | + |
| 54 | +void pce_acard_duo_device::device_start() |
| 55 | +{ |
| 56 | + save_item(STRUCT_MEMBER(m_port, m_ctrl)); |
| 57 | + save_item(STRUCT_MEMBER(m_port, m_base_addr)); |
| 58 | + save_item(STRUCT_MEMBER(m_port, m_addr_offset)); |
| 59 | + save_item(STRUCT_MEMBER(m_port, m_addr_inc)); |
| 60 | + save_item(NAME(m_shift)); |
| 61 | + save_item(NAME(m_shift_reg)); |
| 62 | + save_item(NAME(m_rotate_reg)); |
| 63 | +} |
| 64 | + |
| 65 | +void pce_acard_pro_device::device_start() |
| 66 | +{ |
| 67 | + pce_acard_duo_device::device_start(); |
| 68 | + |
| 69 | + m_scdsys.init(*this); |
| 70 | + m_scdsys.set_region(false); |
| 71 | +} |
| 72 | + |
| 73 | +void pce_acard_duo_device::device_reset() |
| 74 | +{ |
| 75 | + for (auto &port : m_port) |
| 76 | + { |
| 77 | + port.m_ctrl = 0; |
| 78 | + port.m_base_addr = 0; |
| 79 | + port.m_addr_offset = 0; |
| 80 | + port.m_addr_inc = 0; |
| 81 | + } |
| 82 | + m_shift = 0; |
| 83 | + m_shift_reg = 0; |
| 84 | + m_rotate_reg = 0; |
| 85 | +} |
| 86 | + |
| 87 | +/*------------------------------------------------- |
| 88 | + mapper specific handlers |
| 89 | + -------------------------------------------------*/ |
| 90 | + |
| 91 | +void pce_acard_duo_device::install_memory_handlers(address_space &space) |
| 92 | +{ |
| 93 | + space.install_readwrite_handler(0x080000, 0x087fff, emu::rw_delegate(*this, FUNC(pce_acard_duo_device::ram_r)), emu::rw_delegate(*this, FUNC(pce_acard_duo_device::ram_w))); |
| 94 | + // TODO: mirrored? |
| 95 | + space.install_readwrite_handler(0x1ffa00, 0x1ffaff, 0, 0x100, 0, emu::rw_delegate(*this, FUNC(pce_acard_duo_device::peripheral_r)), emu::rw_delegate(*this, FUNC(pce_acard_duo_device::peripheral_w))); |
| 96 | +} |
| 97 | + |
| 98 | +void pce_acard_pro_device::install_memory_handlers(address_space &space) |
| 99 | +{ |
| 100 | + space.install_rom(0x000000, 0x03ffff, 0x040000, m_rom); // TODO: underdumped or mirrored? |
| 101 | + space.install_ram(0x0d0000, 0x0fffff, m_scdsys.ram()); |
| 102 | + space.install_read_handler(0x1ff8c0, 0x1ff8c7, 0, 0x130, 0, emu::rw_delegate(*this, FUNC(pce_acard_pro_device::register_r))); |
| 103 | + pce_acard_duo_device::install_memory_handlers(space); |
| 104 | +} |
| 105 | + |
| 106 | +uint8_t pce_acard_duo_device::ram_r(offs_t offset) |
| 107 | +{ |
| 108 | + return peripheral_r((offset & 0x6000) >> 9); |
| 109 | +} |
| 110 | + |
| 111 | +void pce_acard_duo_device::ram_w(offs_t offset, uint8_t data) |
| 112 | +{ |
| 113 | + peripheral_w((offset & 0x6000) >> 9, data); |
| 114 | +} |
| 115 | + |
| 116 | +uint8_t pce_acard_duo_device::peripheral_r(offs_t offset) |
| 117 | +{ |
| 118 | + if ((offset & 0xe0) == 0xe0) |
| 119 | + { |
| 120 | + switch (offset & 0x1f) |
| 121 | + { |
| 122 | + case 0x00: return (m_shift >> 0) & 0xff; |
| 123 | + case 0x01: return (m_shift >> 8) & 0xff; |
| 124 | + case 0x02: return (m_shift >> 16) & 0xff; |
| 125 | + case 0x03: return (m_shift >> 24) & 0xff; |
| 126 | + case 0x04: return m_shift_reg; |
| 127 | + case 0x05: return m_rotate_reg; |
| 128 | + case 0x1c: return 0x00; |
| 129 | + case 0x1d: return 0x00; |
| 130 | + case 0x1e: return 0x10; // Version number (MSB?) |
| 131 | + case 0x1f: return 0x51; // Arcade Card ID |
| 132 | + } |
| 133 | + |
| 134 | + return 0xff; |
| 135 | + } |
| 136 | + |
| 137 | + dram_port &port = m_port[(offset & 0x30) >> 4]; |
| 138 | + |
| 139 | + switch (offset & 0x8f) |
| 140 | + { |
| 141 | + case 0x00: |
| 142 | + case 0x01: |
| 143 | + { |
| 144 | + uint8_t const res = m_ram[port.ram_addr()]; |
| 145 | + |
| 146 | + if (!machine().side_effects_disabled()) |
| 147 | + port.addr_increment(); |
| 148 | + |
| 149 | + return res; |
| 150 | + } |
| 151 | + case 0x02: return (port.m_base_addr >> 0) & 0xff; |
| 152 | + case 0x03: return (port.m_base_addr >> 8) & 0xff; |
| 153 | + case 0x04: return (port.m_base_addr >> 16) & 0xff; |
| 154 | + case 0x05: return (port.m_addr_offset >> 0) & 0xff; |
| 155 | + case 0x06: return (port.m_addr_offset >> 8) & 0xff; |
| 156 | + case 0x07: return (port.m_addr_inc >> 0) & 0xff; |
| 157 | + case 0x08: return (port.m_addr_inc >> 8) & 0xff; |
| 158 | + case 0x09: return port.m_ctrl; |
| 159 | + default: return 0xff; |
| 160 | + } |
| 161 | +} |
| 162 | + |
| 163 | +void pce_acard_duo_device::peripheral_w(offs_t offset, uint8_t data) |
| 164 | +{ |
| 165 | + if ((offset & 0xe0) == 0xe0) |
| 166 | + { |
| 167 | + switch (offset & 0x0f) |
| 168 | + { |
| 169 | + case 0: m_shift = (data & 0xff) | (m_shift & 0xffffff00); break; |
| 170 | + case 1: m_shift = (data << 8) | (m_shift & 0xffff00ff); break; |
| 171 | + case 2: m_shift = (data << 16) | (m_shift & 0xff00ffff); break; |
| 172 | + case 3: m_shift = (data << 24) | (m_shift & 0x00ffffff); break; |
| 173 | + case 4: |
| 174 | + m_shift_reg = data & 0x0f; |
| 175 | + |
| 176 | + if (m_shift_reg != 0) |
| 177 | + { |
| 178 | + m_shift = (m_shift_reg < 8) |
| 179 | + ? (m_shift << m_shift_reg) |
| 180 | + : (m_shift >> (16 - m_shift_reg)); |
| 181 | + } |
| 182 | + break; |
| 183 | + case 5: |
| 184 | + m_rotate_reg = data & 0x0f; |
| 185 | + |
| 186 | + if (m_rotate_reg != 0) |
| 187 | + { |
| 188 | + m_shift = (m_rotate_reg < 8) |
| 189 | + ? ((m_shift << m_rotate_reg) | (m_shift >> (32 - m_rotate_reg))) |
| 190 | + : ((m_shift >> (16 - m_rotate_reg)) | (m_shift << (32 - (16 - m_rotate_reg)))); |
| 191 | + } |
| 192 | + break; |
| 193 | + } |
| 194 | + } |
| 195 | + else |
| 196 | + { |
| 197 | + dram_port &port = m_port[(offset & 0x30) >> 4]; |
| 198 | + |
| 199 | + switch (offset & 0x8f) |
| 200 | + { |
| 201 | + case 0x00: |
| 202 | + case 0x01: |
| 203 | + m_ram[port.ram_addr()] = data; |
| 204 | + |
| 205 | + port.addr_increment(); |
| 206 | + break; |
| 207 | + |
| 208 | + case 0x02: port.m_base_addr = (data & 0xff) | (port.m_base_addr & 0xffff00); break; |
| 209 | + case 0x03: port.m_base_addr = (data << 8) | (port.m_base_addr & 0xff00ff); break; |
| 210 | + case 0x04: port.m_base_addr = (data << 16) | (port.m_base_addr & 0x00ffff); break; |
| 211 | + case 0x05: |
| 212 | + port.m_addr_offset = (data & 0xff) | (port.m_addr_offset & 0xff00); |
| 213 | + |
| 214 | + if ((port.m_ctrl & 0x60) == 0x20) |
| 215 | + port.adjust_addr(); |
| 216 | + break; |
| 217 | + case 0x06: |
| 218 | + port.m_addr_offset = (data << 8) | (port.m_addr_offset & 0x00ff); |
| 219 | + |
| 220 | + if ((port.m_ctrl & 0x60) == 0x40) |
| 221 | + port.adjust_addr(); |
| 222 | + break; |
| 223 | + case 0x07: port.m_addr_inc = (data & 0xff) | (port.m_addr_inc & 0xff00); break; |
| 224 | + case 0x08: port.m_addr_inc = (data << 8) | (port.m_addr_inc & 0x00ff); break; |
| 225 | + case 0x09: port.m_ctrl = data & 0x7f; break; |
| 226 | + case 0x0a: |
| 227 | + if ((port.m_ctrl & 0x60) == 0x60) |
| 228 | + port.adjust_addr(); |
| 229 | + break; |
| 230 | + } |
| 231 | + } |
| 232 | +} |
0 commit comments