@@ -766,12 +766,11 @@ u16 tek440x_state::memory_r(offs_t offset, u16 mem_mask)
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{
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if ((m_maincpu->get_fc () & 4 ) == 0 ) // User mode access updates map_control from write latch
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{
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- // NB need to apply once only as m_map_control gets modified
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- if (m_latched_map_control && m_latched_map_control != m_map_control)
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+ if (m_latched_map_control != (m_map_control & 0x3f ))
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{
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- LOG (" memory_r: m_map_control updated\n " );
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- m_map_control = m_latched_map_control ;
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- m_latched_map_control = 0 ;
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+ LOG (" memory_r: m_map_control updated 0x%04x \n " , m_latched_map_control );
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+ m_map_control &= ~ 0x3f ;
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+ m_map_control |= m_latched_map_control ;
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}
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}
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@@ -834,11 +833,11 @@ void tek440x_state::memory_w(offs_t offset, u16 data, u16 mem_mask)
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{
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if ((m_maincpu->get_fc () & 4 ) == 0 ) // User mode access updates map_control from write latch
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{
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- if (m_latched_map_control && m_latched_map_control != m_map_control)
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+ if (m_latched_map_control != ( m_map_control & 0x3f ) )
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{
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- LOG (" memory_w: m_map_control updated\n " );
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- m_map_control = m_latched_map_control ;
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- m_latched_map_control = 0 ;
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+ LOG (" memory_w: m_map_control updated 0x%04x \n " , m_latched_map_control );
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+ m_map_control &= ~ 0x3f ;
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+ m_map_control |= m_latched_map_control ;
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}
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}
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@@ -943,7 +942,8 @@ void tek440x_state::map_w(offs_t offset, u16 data, u16 mem_mask)
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m_maincpu->pc ());
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}
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- if (BIT (m_map_control, MAP_SYS_WR_ENABLE))
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+ // NB page 2.1-52 shows WrMapEn coming from latch
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+ if (BIT (m_latched_map_control, MAP_SYS_WR_ENABLE))
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{
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COMBINE_DATA (&m_map[(offset >> 11 ) & 0x7ff ]);
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}
@@ -979,7 +979,7 @@ void tek440x_state::mapcntl_w(u8 data)
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// copied on user mode read/write
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m_latched_map_control = data & 0x3f ;
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- if (m_map_control != (data & 0x3f ) )
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+ if (m_map_control != m_latched_map_control )
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{
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LOGMASKED (LOG_MMU, " mapcntl_w(%02x) cpuWr(%d) BlockAccess(%d) SysWrEn(%d) PID(%d) pc(%08x)\n " ,m_latched_map_control,
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BIT (m_latched_map_control, MAP_CPU_WR) ? 1 : 0 ,
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