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DEFINE_DEVICE_TYPE (SH_INTC, sh_intc_device, " sh_intc" , " SH interrupt controller" )
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+ const u8 sh_intc_device::pribit[0x100] = {
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+ 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ,
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+ 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ,
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+ 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ,
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+ 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ,
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+ 0 , 1 , 2 , 3 , 4 , 5 , 6 , 7 , 8 , 8 , 8 , 8 , 9 , 9 , 9 , 9 ,
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+ 10 , 10 , 10 , 10 , 11 , 11 , 11 , 11 , 12 , 12 , 12 , 12 , 13 , 13 , 13 , 13 ,
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+ 14 , 14 , 14 , 14 , 15 , 15 , 15 , 15 , 16 , 16 , 16 , 16 , 17 , 17 , 17 , 17 ,
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+ 18 , 18 , 18 , 18 , 19 , 19 , 19 , 19 , 20 , 20 , 20 , 20 , 21 , 21 , 21 , 21 ,
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+ 22 , 22 , 22 , 22 , 23 , 23 , 23 , 23 , 24 , 24 , 24 , 24 , 25 , 25 , 25 , 25 ,
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+ 26 , 26 , 26 , 26 , 27 , 27 , 27 , 27 , 28 , 28 , 28 , 28 , 29 , 29 , 29 , 29 ,
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+ 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 ,
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+ 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 ,
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+ 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 ,
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+ 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 ,
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+ 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 ,
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+ 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 , 29 ,
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+ };
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+
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sh_intc_device::sh_intc_device (const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
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device_t(mconfig, SH_INTC, tag, owner, clock),
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m_cpu(*this , finder_base::DUMMY_TAG)
@@ -23,6 +42,13 @@ sh_intc_device::sh_intc_device(const machine_config &mconfig, const char *tag, d
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void sh_intc_device::device_start ()
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{
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+ save_item (NAME (m_ipr));
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+ save_item (NAME (m_icr));
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+ save_item (NAME (m_isr));
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+
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+ std::fill (m_ipr.begin (), m_ipr.end (), 0 );
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+ m_isr = 0 ;
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+ m_icr = 0 ;
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}
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void sh_intc_device::device_reset ()
@@ -36,7 +62,11 @@ int sh_intc_device::interrupt_taken(int vector)
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void sh_intc_device::internal_interrupt (int vector)
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{
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- logerror (" Internal interrupt %d\n " , vector);
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+ u32 slot = pribit[vector];
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+ u32 shift = 12 -4 *(slot & 3 );
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+ u32 level = (m_ipr[slot >> 2 ] >> shift) & 15 ;
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+ logerror (" Internal interrupt %d / %d (ipr%c %d-%d)\n " , vector, level, ' a' + (slot >> 2 ), shift + 3 , shift);
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+ m_cpu->set_internal_interrupt (level, vector);
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}
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void sh_intc_device::set_input (int inputnum, int state)
@@ -45,31 +75,34 @@ void sh_intc_device::set_input(int inputnum, int state)
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u16 sh_intc_device::icr_r ()
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{
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- return 0 ;
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+ return m_icr ;
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}
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void sh_intc_device::icr_w (offs_t , u16 data, u16 mem_mask)
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{
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+ COMBINE_DATA (&m_icr);
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logerror (" icr_w %04x @ %04x\n " , data, mem_mask);
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}
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u16 sh_intc_device::isr_r ()
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{
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- return 0 ;
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+ return m_isr ;
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}
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void sh_intc_device::isr_w (offs_t , u16 data, u16 mem_mask)
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{
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+ COMBINE_DATA (&m_isr);
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logerror (" isr_w %04x @ %04x\n " , data, mem_mask);
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}
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u16 sh_intc_device::ipr_r (offs_t offset)
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{
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- return 0 ;
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+ return m_ipr[offset] ;
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}
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void sh_intc_device::ipr_w (offs_t offset, u16 data, u16 mem_mask)
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{
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+ COMBINE_DATA (&m_ipr[offset]);
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logerror (" ipr_w %x, %04x @ %04x\n " , offset, data, mem_mask);
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}
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