Miscellaneous cleanups:

konami/hexion.cpp: Fixed a potential heap smash, and don't mark tiles
dirty unnecessarily.

konami/spy.cpp: Fixed video enable never being set to false, added an
object finder for ROM bank (reduce tag lookups).

tvgames/xavix.cpp: It's stylised "Hi-kara" (no capital K), software list
already uses this capitalisation.

rm/rm380z*: Added object finder for character generator ROM, slightly
cleaned up some code.

homelab/homelab.cpp: Avoid some literal sizes.

Author: cuavas

src/lib/util/flac.cpp

@@ -601,12 +601,12 @@ FLAC__StreamDecoderTellStatus flac_decoder::tell_callback_static(const FLAC__Str
 //  stream
 //-------------------------------------------------
 
-FLAC__StreamDecoderWriteStatus flac_decoder::write_callback_static(const FLAC__StreamDecoder *decoder, const ::FLAC__Frame *frame, const FLAC__int32 * const buffer[], void *client_data)
+FLAC__StreamDecoderWriteStatus flac_decoder::write_callback_static(const FLAC__StreamDecoder *decoder, const ::FLAC__Frame *frame, const FLAC__int32 *const buffer[], void *client_data)
 {
 	return reinterpret_cast<flac_decoder *>(client_data)->write_callback(frame, buffer);
 }
 
-FLAC__StreamDecoderWriteStatus flac_decoder::write_callback(const ::FLAC__Frame *frame, const FLAC__int32 * const buffer[])
+FLAC__StreamDecoderWriteStatus flac_decoder::write_callback(const ::FLAC__Frame *frame, const FLAC__int32 *const buffer[])
 {
 	assert(frame->header.channels == channels());
 
@@ -633,7 +633,7 @@ FLAC__StreamDecoderWriteStatus flac_decoder::write_callback(const ::FLAC__Frame
 	}
 }
 
-template <flac_decoder::DECODE_MODE Mode, bool SwapEndian> FLAC__StreamDecoderWriteStatus flac_decoder::write_callback(const ::FLAC__Frame *frame, const FLAC__int32 * const buffer[])
+template <flac_decoder::DECODE_MODE Mode, bool SwapEndian> FLAC__StreamDecoderWriteStatus flac_decoder::write_callback(const ::FLAC__Frame *frame, const FLAC__int32 *const buffer[])
 {
 	const int blocksize = frame->header.blocksize;
 	const int shift = (Mode == SCALE_DOWN) ? frame->header.bits_per_sample - m_bits_per_sample : (Mode == SCALE_UP) ? m_bits_per_sample - frame->header.bits_per_sample : 0;

src/lib/util/flac.h

@@ -123,9 +123,9 @@ class flac_decoder
 	FLAC__StreamDecoderReadStatus read_callback(FLAC__byte buffer[], size_t *bytes);
 	static void metadata_callback_static(const FLAC__StreamDecoder *decoder, const FLAC__StreamMetadata *metadata, void *client_data);
 	static FLAC__StreamDecoderTellStatus tell_callback_static(const FLAC__StreamDecoder *decoder, FLAC__uint64 *absolute_byte_offset, void *client_data);
-	static FLAC__StreamDecoderWriteStatus write_callback_static(const FLAC__StreamDecoder *decoder, const ::FLAC__Frame *frame, const FLAC__int32 * const buffer[], void *client_data);
-	FLAC__StreamDecoderWriteStatus write_callback(const ::FLAC__Frame *frame, const FLAC__int32 * const buffer[]);
-	template <DECODE_MODE Mode, bool SwapEndian> FLAC__StreamDecoderWriteStatus write_callback(const ::FLAC__Frame *frame, const FLAC__int32 * const buffer[]);
+	static FLAC__StreamDecoderWriteStatus write_callback_static(const FLAC__StreamDecoder *decoder, const ::FLAC__Frame *frame, const FLAC__int32 *const buffer[], void *client_data);
+	FLAC__StreamDecoderWriteStatus write_callback(const ::FLAC__Frame *frame, const FLAC__int32 *const buffer[]);
+	template <DECODE_MODE Mode, bool SwapEndian> FLAC__StreamDecoderWriteStatus write_callback(const ::FLAC__Frame *frame, const FLAC__int32 *const buffer[]);
 	static void error_callback_static(const FLAC__StreamDecoder *decoder, FLAC__StreamDecoderErrorStatus status, void *client_data);
 
 	// output state

src/mame/homelab/homelab.cpp

@@ -47,8 +47,8 @@ MB7051 - fuse programmed prom.
 #include "screen.h"
 #include "speaker.h"
 
-namespace
-{
+namespace {
+
 class homelab_state : public driver_device
 {
 public:
@@ -84,15 +84,15 @@ class homelab2_state : public homelab_state
 {
 public:
 	homelab2_state(const machine_config &mconfig, device_type type, const char *tag) :
-	homelab_state(mconfig, type, tag),
-	m_nmi(0),
-	m_screenshadow_is_text_mode(true),
-	m_screenshadowY0(0),
-	m_screenshadowX0(0),
-	m_spr_bit(0)
+		homelab_state(mconfig, type, tag),
+		m_nmi(0),
+		m_screenshadow_is_text_mode(true),
+		m_screenshadowY0(0),
+		m_screenshadowX0(0),
+		m_spr_bit(0)
 	{
-		std::fill_n(m_4000shadow, 0x4000, 0);
-		std::fill_n(m_screenshadow, 40 * 265, 0);
+		std::fill(std::begin(m_4000shadow), std::end(m_4000shadow), 0);
+		std::fill(std::begin(m_screenshadow), std::end(m_screenshadow), 0);
 	}
 
 	void homelab2(machine_config &config);

src/mame/konami/hexion.cpp

@@ -14,77 +14,77 @@ driver by Nicola Salmoria
 This is the 052591 PMC code loaded at startup, it contains a RAM/VRAM filling program.
 See https://github.com/furrtek/SiliconRE/tree/master/Konami/052591 for details
 
-00: 5f 80 01 e0 08	Entry point, set OUT0 high
-01: df 80 00 e0 0c	r0 = 0
-02: df 90 02 e0 0c	r1 = 2
-03: df a0 03 e0 0c	r2 = 3
-04: df b0 0f e0 0c	r3 = f
-05: df c0 ff bf 0c	ExtAddr = 1fff, r4 = ffff
-06: 5c 02 00 33 0c	
-07: 5f 80 04 80 0c	Write 2 to RAM (1fff) m_bankctrl, select pmcram
+00: 5f 80 01 e0 08  Entry point, set OUT0 high
+01: df 80 00 e0 0c  r0 = 0
+02: df 90 02 e0 0c  r1 = 2
+03: df a0 03 e0 0c  r2 = 3
+04: df b0 0f e0 0c  r3 = f
+05: df c0 ff bf 0c  ExtAddr = 1fff, r4 = ffff
+06: 5c 02 00 33 0c
+07: 5f 80 04 80 0c  Write 2 to RAM (1fff) m_bankctrl, select pmcram
 08: 5c 0e 00 2b 0c
-09: df 70 00 cb 08	r7 = RAM(4)
-0a: 5f 80 00 80 0c	ExtAddr = 0
+09: df 70 00 cb 08  r7 = RAM(4)
+0a: 5f 80 00 80 0c  ExtAddr = 0
 0b: 5c 04 00 2b 0c
-0c: df 60 00 cb 08	r6 = RAM(0) (commands 0, 1 and 30 are used)
-0d: 5c 0c 1f e9 0c	JP 1F if r6 == 0 
-0e: 4c 0c 2d e9 08	JP 2D if r6 == 1 
+0c: df 60 00 cb 08  r6 = RAM(0) (commands 0, 1 and 30 are used)
+0d: 5c 0c 1f e9 0c  JP 1F if r6 == 0
+0e: 4c 0c 2d e9 08  JP 2D if r6 == 1
 
 Command anything other than 00 or 01: Set bank to r7, then clear 16 bytes starting from r5.w
-0f: 5f 80 03 80 0c	ExtAddr = 3
+0f: 5f 80 03 80 0c  ExtAddr = 3
 10: 5c 04 00 2b 0c
-11: 5f 00 00 cb 00	Read MSB from RAM[3]
-12: 5f 80 02 a0 0c	ExtAddr = 2
-13: df d0 00 c0 04	r5.w = RAM[3], RAM[2]
-14: 01 3a 00 f3 0a	acc = r5 + r3 = r5 + f
+11: 5f 00 00 cb 00  Read MSB from RAM[3]
+12: 5f 80 02 a0 0c  ExtAddr = 2
+13: df d0 00 c0 04  r5.w = RAM[3], RAM[2]
+14: 01 3a 00 f3 0a  acc = r5 + r3 = r5 + f
 15: 5c 08 00 b3 0c
-16: 5c 0e 00 13 0c	Write 3 to RAM[1fff] m_bankctrl
+16: 5c 0e 00 13 0c  Write 3 to RAM[1fff] m_bankctrl
 17: 5f 80 00 a0 0c
-18: 5c 00 00 13 0c	Write r7 to RAM[0]
+18: 5c 00 00 13 0c  Write r7 to RAM[0]
 19: 5c 08 00 b3 0c
-1a: 5c 00 00 13 0c	Write 0 to RAM[1fff] m_bankctrl, select vram
+1a: 5c 00 00 13 0c  Write 0 to RAM[1fff] m_bankctrl, select vram
 1b: 84 5a 00 b3 0c
-1c: 48 0a 5b d1 0c	Write 0 to RAM[r5++] until r5 > acc (16 times)
-1d: 5f 80 00 e0 08	Set OUT0 low
-1e: 5f 00 1e fd 0c	JP 1E, infinite loop
+1c: 48 0a 5b d1 0c  Write 0 to RAM[r5++] until r5 > acc (16 times)
+1d: 5f 80 00 e0 08  Set OUT0 low
+1e: 5f 00 1e fd 0c  JP 1E, infinite loop
 
 Command is 00: Set bank to 0 and fill from 0 to 0x1fff with r2.b
 1f: 5f 80 01 a0 0c
-20: df 20 00 cb 08	r2 = RAM[1]
+20: df 20 00 cb 08  r2 = RAM[1]
 21: 5c 08 00 b3 0c
-22: 5f 80 03 00 0c	Write 3 to RAM[1fff] m_bankctrl
+22: 5f 80 03 00 0c  Write 3 to RAM[1fff] m_bankctrl
 23: 5c 08 00 b3 0c
-24: 5f 80 00 80 0c	Write 3 to RAM[1fff] m_bankctrl
+24: 5f 80 00 80 0c  Write 3 to RAM[1fff] m_bankctrl
 25: 5c 00 00 33 0c
-26: 5c 08 00 93 0c	Write 0 to RAM[0]
-27: 9f 91 ff cf 0e	Write 0 to RAM[1fff] m_bankctrl, select vram, r1 = fff << 1 = 1ffe
+26: 5c 08 00 93 0c  Write 0 to RAM[0]
+27: 9f 91 ff cf 0e  Write 0 to RAM[1fff] m_bankctrl, select vram, r1 = fff << 1 = 1ffe
 28: 5c 84 00 20 0c
-29: 84 00 00 b3 0c	ExtAddr = r0
-2a: 49 10 69 d1 0c	Write r2 to RAM[r0++] while r0 < r1
-2b: 5f 80 00 e0 08	Set OUT0 low
-2c: 5f 00 2c fd 0c	JP 2C, infinite loop
+29: 84 00 00 b3 0c  ExtAddr = r0
+2a: 49 10 69 d1 0c  Write r2 to RAM[r0++] while r0 < r1
+2b: 5f 80 00 e0 08  Set OUT0 low
+2c: 5f 00 2c fd 0c  JP 2C, infinite loop
 
 Command is 01: Set banks to 1 and fill from 0 to 0x1fff with r2.b
 2d: 5f 80 01 a0 0c
-2e: df 20 00 cb 08	r2 = RAM(1)
+2e: df 20 00 cb 08  r2 = RAM(1)
 2f: 5c 08 00 b3 0c
-30: 5f 80 03 00 0c	Write 3 to RAM[1fff] m_bankctrl
+30: 5f 80 03 00 0c  Write 3 to RAM[1fff] m_bankctrl
 31: 5c 00 00 b3 0c
-32: 5f 80 01 00 0c	Write 3 to RAM[0]
+32: 5f 80 01 00 0c  Write 3 to RAM[0]
 33: 5c 08 00 b3 0c
-34: 5f 80 00 80 0c	Write 1 to RAM[1fff] m_bankctrl
+34: 5f 80 00 80 0c  Write 1 to RAM[1fff] m_bankctrl
 35: 5c 00 00 33 0c
-36: 5c 08 00 93 0c	Write 0 to RAM[0]
-37: 9f 91 ff cf 0e	Write 0 to RAM[1fff] m_bankctrl, select vram, r1 = fff << 1 = 1ffe
+36: 5c 08 00 93 0c  Write 0 to RAM[0]
+37: 9f 91 ff cf 0e  Write 0 to RAM[1fff] m_bankctrl, select vram, r1 = fff << 1 = 1ffe
 38: 5c 84 00 20 0c
 39: 84 00 00 b3 0c
-3a: 49 10 79 d1 0c	Write r2 to RAM[r0++] while r0 < r1
-3b: 5f 80 00 e0 08	Set OUT0 low
-3c: 5f 00 3c fd 0c	JP 3C, infinite loop
+3a: 49 10 79 d1 0c  Write r2 to RAM[r0++] while r0 < r1
+3b: 5f 80 00 e0 08  Set OUT0 low
+3c: 5f 00 3c fd 0c  JP 3C, infinite loop
 
-3d: ff ff ff ff ff	Garbage
-3e: ff ff ff ff ff	Garbage
-3f: ff ff ff ff ff	Garbage
+3d: ff ff ff ff ff  Garbage
+3e: ff ff ff ff ff  Garbage
+3f: ff ff ff ff ff  Garbage
 
 ***************************************************************************/
 
@@ -102,6 +102,7 @@ Command is 01: Set banks to 1 and fill from 0 to 0x1fff with r2.b
 #include "emupal.h"
 #include "speaker.h"
 #include "tilemap.h"
+
 #include "multibyte.h"
 
 
@@ -131,7 +132,7 @@ class hexion_state : public driver_device
 		m_gfxdecode(*this, "gfxdecode"),
 		m_palette(*this, "palette"),
 		m_vram(*this, "vram%u", 0U, 0x2000U, ENDIANNESS_LITTLE),
-		m_pmcram(*this, "pmcram", 0x800, ENDIANNESS_LITTLE),	// Might be an unused area of VRAM
+		m_pmcram(*this, "pmcram", 0x800, ENDIANNESS_LITTLE),    // Might be an unused area of VRAM
 		m_rombank(*this, "rombank"),
 		m_tilesrom(*this, "tiles")
 	{ }
@@ -243,23 +244,27 @@ void hexion_state::bankswitch_w(uint8_t data)
 	m_rombank->set_entry(data & 0x0f);
 
 	// bit 6 triggers the 052591
-	if (data & 0x40)
+	if (BIT(data, 6))
 	{
-		uint8_t command = m_pmcram[0];
+		const uint8_t command = m_pmcram[0];
 		if (command <= 1)
 		{
 			memset(m_vram[command], m_pmcram[1], 0x2000);
 			m_bg_tilemap[command]->mark_all_dirty();
 		}
 		else
 		{
-			uint8_t bank = m_pmcram[4] & 1;
-			memset(m_vram[bank] + (get_u16le(&m_pmcram[2]) & 0x1fff), 0, 16);
-			m_bg_tilemap[bank]->mark_all_dirty();
+			const uint8_t bank = m_pmcram[4] & 1;
+			const uint16_t offset = get_u16le(&m_pmcram[2]);
+			for (int i = 0; 16 > i; ++i)
+				m_vram[bank][(offset + i) & 0x1fff] = 0;
+			for (int i = 0; 4 > i; ++i)
+				m_bg_tilemap[bank]->mark_tile_dirty(((offset >> 2) + i) & 0x07ff);
 		}
 	}
+
 	// bit 7 = PMC-BK
-	m_pmcbank = (data & 0x80) >> 7;
+	m_pmcbank = BIT(data, 7);
 
 	// other bits unknown
 	if (data & 0x30)
@@ -300,7 +305,7 @@ void hexion_state::bankedram_w(offs_t offset, uint8_t data)
 		{
 			LOGBANKEDRAM("%s: bankedram_w offset %04x, data %02x, bankctrl = %02x\n", m_maincpu->pc(), offset, data, m_bankctrl);
 			m_vram[m_rambank][offset] = data;
-			m_bg_tilemap[m_rambank]->mark_tile_dirty(offset/4);
+			m_bg_tilemap[m_rambank]->mark_tile_dirty(offset >> 2);
 		}
 		else
 			LOGBANKEDRAM("%04x pmc internal ram %04x = %02x\n", m_maincpu->pc(), offset, data);