Merge branch 'master' into pci_virge-fifo

3rdparty/asmjit/.gitignore

@@ -1,6 +1,3 @@
 /build
 /build_*
-/tools/asmdb
 .vscode
-.kdev4
-*.kdev4

3rdparty/asmjit/CONTRIBUTING.md

@@ -0,0 +1,102 @@
+## How to Contribute to AsmJit
+
+### Did you find a bug or something isn't working as expected?
+
+  * Please use [Issues](https://github.com/asmjit/asmjit/issues) page to report bugs or create a [pull request](https://github.com/asmjit/asmjit/pulls) if you have already fixed it.
+
+  * Make sure that when a bug is reported it provides as much information as possible to make it easy to either reproduce it locally or to at least guess where the problem could be. AsmJit is a low-level tool, which makes it very easy to emit code that would crash or not work as intended when executed. Always use AsmJit's [Logging](https://asmjit.com/doc/group__asmjit__logging.html) and [Error Handling](https://asmjit.com/doc/group__asmjit__error__handling.html) features first to analyze whether there is not a simple to catch bug in your own code.
+
+  * Don't be afraid to ask for help if you don't know how to solve a particular problem or in case it's unclear how to do it. The community would help if the problem is well described and has a solution. In general we always try to at least improve the documentation in case it doesn't provide enough information and users must ask for help.
+
+### Asking questions
+
+  * We prefer GitHub issues to be used for reporting bugs or feature requests, but it's still okay to ask questions there as well. However, please consider joining our [Gitter Chat](https://app.gitter.im/#/room/#asmjit:gitter.im) to ask questions; it has an active community that can quickly respond.
+
+### Suggesting feature requests
+
+  * It's very likely that when using AsmJit you have found something that AsmJit doesn't provide, which would be handy to have as a built-in. The [Issues](https://github.com/asmjit/asmjit/issues) page can be used to submit feature requests, but please keep in mind that AsmJit is a relatively small project and not all requested features will be accepted, especially if they are non-trivial, time consuming to implement, or the scope of the feature doesn't match AsmJit goals.
+
+  * If you have already implemented the feature you are suggesting, please open a [pull request](https://github.com/asmjit/asmjit/pulls).
+
+  * Ports (requesting new AsmJit backends) can be reported as feature requests, but only by people that are willing to work on them as creating new ports takes a lot of time.
+
+### Suggesting a documentation enhancement
+
+  * [AsmJit's documentation](https://asmjit.com/doc/index.html) is auto-generated from source code, so if you would like to improve it just open a [pull request](https://github.com/asmjit/asmjit/pulls) with your changes. The documentation uses [Doxygen](https://www.doxygen.nl/) as a front-end, so you can use `\ref` keyword to create links and other Doxygen keywords to enhance the documentation.
+
+### Suggesting a website content enhancement
+
+  * [AsmJit's website](https://asmjit.com) is also generated, but not from public sources at the moment. If you did find an issue on the website you can either use contact information on the [support page](https://asmjit.com/support.html) or to discuss the change on our [Gitter Chat](https://app.gitter.im/#/room/#asmjit:gitter.im). Alternatively, opening a regular issue is also okay.
+
+
+## Coding Style & Consistency
+
+  * If you decide to open a pull request, make sure that the code you submit uses the same convention as the rest of the code. We prefer keeping the code consistent.
+
+  * [.editorconfig](./.editorconfig) should help with basic settings.
+
+  * Initially, AsmJit coding style was based on Google C++ Style Guide, but it has diverged from it.
+
+  * Include guards use `<PATH_TO_SRC>_H_INCLUDED` format.
+
+  * `asmjit` namespace must be open by `ASMJIT_BEGIN_NAMESPACE` and closed by `ASMJIT_END_NAMESPACE`
+
+  * `asmjit::xxx` (backend specific) nested namespace must be open by `ASMJIT_BEGIN_SUB_NAMESPACE(xxx)` and closed by `ASMJIT_END_SUB_NAMESPACE`.
+
+  * Opening bracket is on the same line, like `struct Something {`, `if (condition) {`, etc...
+
+  * The code uses a soft limit of 120 characters per line (including documentation), but it's not enforced and it's okay to use more when it makes sense (for example defining tables, etc...).
+
+  * Since AsmJit doesn't use Exceptions nor RTTI the code cannot use containers provided by the C++ standard library. In general, we try to only use a bare minimum from the C++ standard library to make it viable to use AsmJit even in C code bases where JIT complier is implemented in C++ ([Erlang](https://www.erlang.org/) can be seen as a great example).
+
+## Testing
+
+  * AsmJit uses a minimalist unit testing framework to write unit tests to avoid third-party dependencies.
+
+  * At the moment tests are in the same file as the implementation and are only compiled when `ASMJIT_TEST` macro is defined.
+
+  * Use `-DASMJIT_TEST=1` when invoking [CMake](https://cmake.org/) to compile AsmJit tests.
+
+  * Unit tests are compiled to a single `asmjit_test_unit[.exe]` executable.
+
+  * Other tests have their own executables based on what is tested.
+
+  * Always add assembler tests when adding new instructions, see [asmjit_test_assembler_x64.cpp](./test/asmjit_test_assembler_x64.cpp) and [asmjit_test_assembler_a64.cpp](./test/asmjit_test_assembler_a64.cpp) for more details.
+
+## Pull Request Messages
+
+  * If a change fixes a bug the message should should start with `[bug]`.
+
+  * If a change fixes or enhances documentation it should start with `[doc]`.
+
+  * If a change fixes or enhances our CI it should start with `[ci]`.
+
+  * If a change breaks ABI it must start with `[abi]`.
+
+  * Otherwise there is no suggested prefix.
+
+## ABI Changes
+
+  * ABI changes happen, but they are usually accumulated and committed within a short time window to not break it often. In general we prefer to break ABI once a year, or once 6 months if there is something that has a high priority. There are no hard rules though.
+
+  * AsmJit uses an `inline namespace`, which should make it impossible to link to AsmJit library that is ABI incompatible. When ABI break happens both AsmJit version and ABI namespace are changed, see [asmjit/core/api-config.h](./src/asmjit/core/api-config.h) for more details.
+
+  * What is an ABI break?
+
+    * Modifying a public struct/class in a way that its functionality is altered and/or its size is changed
+
+    * Adding/removing virtual functions to/from classes, respectively
+
+    * Changing a signature of a public function or a class member function (for example adding a parameter).
+
+    * Changing the value of an enum or global constant (for example instructions are now sorted by name, so adding a new instruction breaks ABI)
+
+    * Possibly more, but these were the most common...
+
+  * What is not ABI break?
+
+    * Extending the functionality by using reserved members of a struct/class
+
+    * Adding new API including new structs and classes
+
+    * Changing anything that is internal and that doesn't leak to public headers

3rdparty/asmjit/LICENSE.md

@@ -1,4 +1,4 @@
-Copyright (c) 2008-2020 The AsmJit Authors
+Copyright (c) 2008-2024 The AsmJit Authors
 
 This software is provided 'as-is', without any express or implied
 warranty. In no event will the authors be held liable for any damages

3rdparty/asmjit/README.md

@@ -5,7 +5,7 @@ AsmJit is a lightweight library for machine code generation written in C++ langu
 
   * [Official Home Page (asmjit.com)](https://asmjit.com)
   * [Official Repository (asmjit/asmjit)](https://github.com/asmjit/asmjit)
-  * [Public Chat Channel](https://gitter.im/asmjit/asmjit)
+  * [Public Chat Channel](https://app.gitter.im/#/room/#asmjit:gitter.im)
   * [Zlib License](./LICENSE.md)
 
 See [asmjit.com](https://asmjit.com) page for more details, examples, and documentation.
@@ -16,41 +16,42 @@ Documentation
   * [Documentation Index](https://asmjit.com/doc/index.html)
   * [Build Instructions](https://asmjit.com/doc/group__asmjit__build.html)
 
+Contributing
+------------
+
+  * See [CONTRIBUTING](./CONTRIBUTING.md) page for more details
+
 Breaking Changes
 ----------------
 
 Breaking the API is sometimes inevitable, what to do?
 
-  * See [Breaking Changes Guide](https://asmjit.com/doc/group__asmjit__breaking__changes.html), which is now part of AsmJit documentation.
+  * See [Breaking Changes Guide](https://asmjit.com/doc/group__asmjit__breaking__changes.html), which is now part of AsmJit documentation
   * See asmjit tests, they always compile and provide implementation of many use-cases:
-    * [asmjit_test_emitters.cpp](./test/asmjit_test_emitters.cpp) - Tests that demonstrate the purpose of emitters.
-    * [asmjit_test_assembler_x86.cpp](./test/asmjit_test_assembler_x86.cpp) - Tests targeting AsmJit's Assembler (x86/x64).
-    * [asmjit_test_compiler_x86.cpp](./test/asmjit_test_compiler_x86.cpp) - Tests targeting AsmJit's Compiler (x86/x64).
-    * [asmjit_test_instinfo.cpp](./test/asmjit_test_instinfo.cpp) - Tests that query instruction information.
+    * [asmjit_test_emitters.cpp](./test/asmjit_test_emitters.cpp) - Tests that demonstrate the purpose of emitters
+    * [asmjit_test_assembler_x86.cpp](./test/asmjit_test_assembler_x86.cpp) - Tests targeting AsmJit's Assembler (x86/x64)
+    * [asmjit_test_compiler_x86.cpp](./test/asmjit_test_compiler_x86.cpp) - Tests targeting AsmJit's Compiler (x86/x64)
+    * [asmjit_test_instinfo.cpp](./test/asmjit_test_instinfo.cpp) - Tests that query instruction information
     * [asmjit_test_x86_sections.cpp](./test/asmjit_test_x86_sections.cpp) - Multiple sections test.
-  * Visit our [Official Chat](https://gitter.im/asmjit/asmjit) if you need a quick help.
+  * Visit our [Gitter Chat](https://app.gitter.im/#/room/#asmjit:gitter.im) if you need a quick help
 
 Project Organization
 --------------------
 
-  * **`/`**        - Project root.
-    * **src**      - Source code.
-      * **asmjit** - Source code and headers (always point include path in here).
-        * **core** - Core API, backend independent except relocations.
-        * **arm**  - ARM specific API, used only by ARM and AArch64 backends.
-        * **x86**  - X86 specific API, used only by X86 and X64 backends.
-    * **test**     - Unit and integration tests (don't embed in your project).
-    * **tools**    - Tools used for configuring, documenting, and generating files.
-
-TODO
-----
-
-  * [ ] Core:
-    * [ ] Add support for user external buffers in CodeBuffer / CodeHolder.
-  * [ ] Ports:
-    * [ ] 32-bit ARM/Thumb port.
-    * [ ] 64-bit ARM (AArch64) port.
-    * [ ] RISC-V port.
+  * **`/`**        - Project root
+    * **src**      - Source code
+      * **asmjit** - Source code and headers (always point include path in here)
+        * **core** - Core API, backend independent except relocations
+        * **arm**  - ARM specific API, used only by ARM and AArch64 backends
+        * **x86**  - X86 specific API, used only by X86 and X64 backends
+    * **test**     - Unit and integration tests (don't embed in your project)
+    * **tools**    - Tools used for configuring, documenting, and generating files
+
+Ports
+-----
+
+  * [ ] 32-bit ARM/Thumb port (work in progress)
+  * [ ] RISC-V port (not in progress, help welcome)
 
 Support
 -------

3rdparty/asmjit/src/asmjit/a64.h

@@ -18,25 +18,24 @@
 //! ### Supported Instructions
 //!
 //!   - Emitters:
-//!     - \ref a64::EmitterExplicitT - Provides all instructions that use explicit
-//!       operands, provides also utility functions. The member functions provided
-//!       are part of all ARM/AArch64 emitters.
+//!     - \ref a64::EmitterExplicitT - Provides all instructions that use explicit operands, provides also utility
+//!       functions. The member functions provided are part of all AArch64 emitters.
 //!
 //!   - Instruction representation:
 //!     - \ref a64::Inst::Id - instruction identifiers.
 //!
 //! ### Register Operands
 //!
-//!   - \ref arm::Reg - Base class for any AArch32/AArch64 register.
-//!     - \ref arm::Gp - General purpose register:
-//!       - \ref arm::GpW - 32-bit register.
-//!       - \ref arm::GpX - 64-bit register.
-//!     - \ref arm::Vec - Vector (SIMD) register:
-//!       - \ref arm::VecB - 8-bit SIMD register (AArch64 only).
-//!       - \ref arm::VecH - 16-bit SIMD register (AArch64 only).
-//!       - \ref arm::VecS - 32-bit SIMD register.
-//!       - \ref arm::VecD - 64-bit SIMD register.
-//!       - \ref arm::VecV - 128-bit SIMD register.
+//!   - \ref arm::Reg - Base class of all AArch32/AArch64 registers.
+//!     - \ref a64::Gp - General purpose register (AArch64):
+//!       - \ref a64::GpW - 32-bit general purpose register (AArch64).
+//!       - \ref a64::GpX - 64-bit general purpose register (AArch64).
+//!     - \ref a64::Vec - Vector (SIMD) register:
+//!       - \ref a64::VecB - 8-bit SIMD register.
+//!       - \ref a64::VecH - 16-bit SIMD register.
+//!       - \ref a64::VecS - 32-bit SIMD register.
+//!       - \ref a64::VecD - 64-bit SIMD register.
+//!       - \ref a64::VecV - 128-bit SIMD register.
 //!
 //! ### Memory Operands
 //!
@@ -46,7 +45,7 @@
 //! ### Other
 //!
 //!   - \ref arm::Shift - Shift operation and value.
-//!   - \ref a64::Utils - Utilities that can help during code generation for AArch64.
+//!   - \ref arm::Utils - Utilities that can help during code generation for AArch32 and AArch64.
 
 #include "./arm.h"
 #include "./arm/a64assembler.h"
@@ -56,7 +55,6 @@
 #include "./arm/a64globals.h"
 #include "./arm/a64instdb.h"
 #include "./arm/a64operand.h"
-#include "./arm/a64utils.h"
 
 #endif // ASMJIT_A64_H_INCLUDED
 

3rdparty/asmjit/src/asmjit/arm.h

@@ -11,11 +11,19 @@
 //! ### Namespaces
 //!
 //!   - \ref arm - arm namespace provides common functionality for both AArch32 and AArch64 backends.
+//!   - \ref a32 - a32 namespace provides support for AArch32 architecture. In addition it includes
+//!     \ref arm namespace, so you can only use a single namespace when targeting AArch32 architecture.
 //!   - \ref a64 - a64 namespace provides support for AArch64 architecture. In addition it includes
 //!     \ref arm namespace, so you can only use a single namespace when targeting AArch64 architecture.
 //!
 //! ### Emitters
 //!
+//!   - AArch32
+//!     - \ref a32::Assembler - AArch32 assembler (must read, provides examples).
+//!     - \ref a32::Builder - AArch32 builder.
+//!     - \ref a32::Compiler - AArch32 compiler.
+//!     - \ref a32::Emitter - AArch32 emitter (abstract).
+//!
 //!   - AArch64
 //!     - \ref a64::Assembler - AArch64 assembler (must read, provides examples).
 //!     - \ref a64::Builder - AArch64 builder.
@@ -24,6 +32,13 @@
 //!
 //! ### Supported Instructions
 //!
+//!   - AArch32:
+//!     - Emitters:
+//!       - \ref a32::EmitterExplicitT - Provides all instructions that use explicit operands, provides also
+//!         utility functions. The member functions provided are part of all AArch32 emitters.
+//!     - Instruction representation:
+//!       - \ref a32::Inst::Id - instruction identifiers.
+//!
 //!   - AArch64:
 //!     - Emitters:
 //!       - \ref a64::EmitterExplicitT - Provides all instructions that use explicit operands, provides also
@@ -33,16 +48,22 @@
 //!
 //! ### Register Operands
 //!
-//!   - \ref arm::Reg - Base class for any AArch32/AArch64 register.
-//!     - \ref arm::Gp - General purpose register:
-//!       - \ref arm::GpW - 32-bit register.
-//!       - \ref arm::GpX - 64-bit register.
-//!     - \ref arm::Vec - Vector (SIMD) register:
-//!       - \ref arm::VecB - 8-bit SIMD register (AArch64 only).
-//!       - \ref arm::VecH - 16-bit SIMD register (AArch64 only).
-//!       - \ref arm::VecS - 32-bit SIMD register.
-//!       - \ref arm::VecD - 64-bit SIMD register.
-//!       - \ref arm::VecV - 128-bit SIMD register.
+//!   - \ref arm::Reg - Base class of all AArch32/AArch64 registers.
+//!     - \ref a32::Gp - 32-bit general purpose register used by AArch32:
+//!     - \ref a64::Gp - 32-bit or 64-bit general purpose register used by AArch64:
+//!       - \ref a64::GpW - 32-bit register (AArch64).
+//!       - \ref a64::GpX - 64-bit register (AArch64).
+//!     - \ref arm::BaseVec - Base vector (SIMD) register.
+//!       - \ref a32::Vec - Vector (SIMD) register (AArch32):
+//!         - \ref a32::VecS - 32-bit SIMD register (AArch32).
+//!         - \ref a32::VecD - 64-bit SIMD register (AArch32).
+//!         - \ref a32::VecV - 128-bit SIMD register (AArch32).
+//!       - \ref a64::Vec - Vector (SIMD) register (AArch64):
+//!         - \ref a64::VecB - 8-bit SIMD register (AArch64).
+//!         - \ref a64::VecH - 16-bit SIMD register (AArch64).
+//!         - \ref a64::VecS - 32-bit SIMD register (AArch64).
+//!         - \ref a64::VecD - 64-bit SIMD register (AArch64).
+//!         - \ref a64::VecV - 128-bit SIMD register (AArch64).
 //!
 //! ### Memory Operands
 //!
@@ -53,10 +74,11 @@
 //!
 //!   - \ref arm::Shift - Shift operation and value (both AArch32 and AArch64).
 //!   - \ref arm::DataType - Data type that is part of an instruction in AArch32 mode.
-//!   - \ref a64::Utils - Utilities that can help during code generation for AArch64.
+//!   - \ref arm::Utils - Utilities that can help during code generation for AArch32 and AArch64.
 
 #include "./core.h"
 #include "./arm/armglobals.h"
 #include "./arm/armoperand.h"
+#include "./arm/armutils.h"
 
 #endif // ASMJIT_ARM_H_INCLUDED

3rdparty/asmjit/src/asmjit/arm/a64archtraits_p.h

@@ -9,6 +9,7 @@
 #include "../core/archtraits.h"
 #include "../core/misc_p.h"
 #include "../core/type.h"
+#include "../arm/a64globals.h"
 #include "../arm/a64operand.h"
 
 ASMJIT_BEGIN_SUB_NAMESPACE(a64)
@@ -24,7 +25,7 @@ static const constexpr ArchTraits a64ArchTraits = {
   // Reserved.
   { 0, 0, 0 },
 
-  // HW stack alignment (AArch64 requires stack aligned to 64 bytes).
+  // HW stack alignment (AArch64 requires stack aligned to 16 bytes at HW level).
   16,
 
   // Min/max stack offset - byte addressing is the worst, VecQ addressing the best.
@@ -39,12 +40,12 @@ static const constexpr ArchTraits a64ArchTraits = {
   }},
 
   // RegInfo.
-  #define V(index) OperandSignature{arm::RegTraits<RegType(index)>::kSignature}
+  #define V(index) OperandSignature{RegTraits<RegType(index)>::kSignature}
   {{ ASMJIT_LOOKUP_TABLE_32(V, 0) }},
   #undef V
 
   // RegTypeToTypeId.
-  #define V(index) TypeId(arm::RegTraits<RegType(index)>::kTypeId)
+  #define V(index) TypeId(RegTraits<RegType(index)>::kTypeId)
   {{ ASMJIT_LOOKUP_TABLE_32(V, 0) }},
   #undef V