MLPerf benchmark: --profile-dir for xprof capture - #4594
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Summary: Adds `train_perf_mlperf_tpu.py`, a steady-state training-throughput benchmark for the faithful MLPerf DLRM-v2 model on the torch_tpu stack (torch side only, no JAX). Same model as the GPU `mlperf_dlrm` runner in D110238830: torchrec `DLRM_DCN` (DCNv2, 3 layers / low-rank 512) over a multi-hot `EmbeddingBagCollection` (pool sum 214), `embedding_dim` 128, dense arch `[512,256,128]`, over arch `[1024,1024,512,256,1]`, per-element Adagrad. Cardinalities selectable via `--cardinality` (`shrunk` sum 30M / `canonical` sum 228M). Embeddings are row-wise sharded on the `UNFUSED_TPU` compute kernel under `DistributedModelParallel` over `tpu_dist`; the dense DCN/MLP path runs on TPU via torch_tpu. Reports steady-state ms/step and K samples/s/chip, the same metric as the jte TPU side, so it is a direct third comparison point for the GPU vs TPU per-chip gap-closure work (B200 GPU vs v7x jte-JAX vs v7x torch_tpu). Faithful-model caveat: the full MLPerf model uses pooled, multi-hot embeddings, which produce an uneven row-wise all2all. The torch_tpu RW path was first brought up for `EmbeddingCollection` / 1-hot / even-split only, so running this faithful config may require pooled-multi-hot / uneven-all2all support that is still landing. Differential Revision: D110794150
Summary: Switches the MLPerf DLRM-v2 torch_tpu train-perf benchmark from ROW_WISE to COLUMN_WISE sharding on the `UNFUSED_TPU` compute kernel, and adds the op registration the CW path needs. Why column-wise: the `tpu_dist` backend implements only EVEN `all_to_all_single`. Row-wise bucketizes ids across ranks by row, which gives data-dependent, uneven per-partition counts. Column-wise reuses the table-wise input dist (`KJTAllToAll`, no bucketization) and splits each table's `embedding_dim` across all ranks, so every rank owns every feature and each destination receives exactly `per_chip_batch * sum(MULTI_HOT_SIZES)` ids -- an even all2all with no id dropping. It also drops the row padding row-wise needed, since every rank keeps every row. - `experimental/torch_tpu/pallas/dispatcher.py`: register a TPU fallback for `fbgemm::permute_pooled_embs_auto_grad_split` that round-trips through CPU, matching the sparse-side permute fallbacks already in this file. The CW output dist uses this op to restore feature order after `PooledEmbeddingsAllToAll`; without a TPU impl the forward fails outright. Autograd flows through the `.to()` calls, so backward runs on CPU too. - `benchmarks/train_dlrm_mlperf_tpu.py`: `row_wise` -> `column_wise(ranks=range(world_size))`; drop the `num_embeddings` round-up to a multiple of `world_size`; set `LOOKUP_MODE=v1_sc` so the forward gather runs on the SparseCore (the unfused backward stays on the TensorCore); move the KJT to device in `make_multihot_kjt` (the splits all2all inside `KJTAllToAll` runs on the KJT's device); assert `EMBEDDING_DIM % world_size == 0` and `(EMBEDDING_DIM // world_size) % 4 == 0`. That second condition matters: `_find_base_dim` rounds each column shard's width up to a multiple of 4, so without it CW places fewer, wider shards on a subset of ranks and the input all2all goes uneven again -- which caps this benchmark at `world_size <= 32` for dim 128. - `distributed/sharding/BUCK`: point the `cw_sharding` target at `fbsource//third-party/pypi/torch:torch` instead of `//caffe2:_torch`. - Two new correctness scripts, one for the pooled TPU kernel in isolation and one for the full CW sharded path, declared as `python_binary` in a new `fb/experiments/torchtpu/BUCK`. They are `python_binary` rather than `python_unittest` on purpose: each calls `dist.init_process_group(backend="tpu_dist")` and needs real SparseCore hardware, so `buck2 test` cannot run them and would collect zero cases and report a vacuous pass. They are launched on the pod with `./run_pod.sh run <file>.py`. The kernel script pins `EMB_DIM = 16` deliberately: the SparseCore `v1_sc` gather silently returns zeros for most rows below the 16-lane vector width (dim 4 is wrong; 8, 16 and 32 are correct). 16 also matches the production shard width of dim 128 over 8 ranks. Differential Revision: D110794151
Summary: Adds an optional `--profile-dir` flag to `train_perf_mlperf_tpu.py` that captures an xprof xplane trace of the timed steps via `jax.profiler.start_trace`/`stop_trace` (rank 0). `jax.profiler` records the TPU device timeline (SparseCore/TensorCore ops) through libtpu regardless of framework, so it works for the torch_tpu path. The trace is flushed with `_materialize()` before `stop_trace()` so pending TPU work lands in the window. Default is off (empty string), so existing runs are unaffected. Usage: point it at `/workspace/traces` and pull with `run_pod.sh copy_traces`, then view with TensorBoard (`tensorboard --logdir ./traces`) or convert to a PerfDoctor URL with `share-trace.sh`. Differential Revision: D110786309
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Summary:
Adds an optional
--profile-dirflag totrain_perf_mlperf_tpu.pythat captures an xprof xplane trace of the timed steps viajax.profiler.start_trace/stop_trace(rank 0).jax.profilerrecords the TPU device timeline (SparseCore/TensorCore ops) through libtpu regardless of framework, so it works for the torch_tpu path. The trace is flushed with_materialize()beforestop_trace()so pending TPU work lands in the window. Default is off (empty string), so existing runs are unaffected.Usage: point it at
/workspace/tracesand pull withrun_pod.sh copy_traces, then view with TensorBoard (tensorboard --logdir ./traces) or convert to a PerfDoctor URL withshare-trace.sh.Differential Revision: D110786309