doc improvements: fem: minor doc improvements #20513

ankuns · 2025-02-20T09:39:56Z

More imperative language is used to express steps needed to enable FEM support.

The improvement initiated by comment #20273 (comment) but these are applied to all FEMs

github-actions · 2025-02-20T09:40:23Z

After documentation is built, you will find the preview for this PR here.

Preview links for modified nRF Connect SDK documents:

https://ncsdoc.z6.web.core.windows.net/PR-20513/nrf/app_dev/device_guides/fem/fem_nrf21540_gpio.html
https://ncsdoc.z6.web.core.windows.net/PR-20513/nrf/app_dev/device_guides/fem/fem_nrf21540_gpio_spi.html
https://ncsdoc.z6.web.core.windows.net/PR-20513/nrf/app_dev/device_guides/fem/fem_nrf2220.html
https://ncsdoc.z6.web.core.windows.net/PR-20513/nrf/app_dev/device_guides/fem/fem_simple_gpio.html
https://ncsdoc.z6.web.core.windows.net/PR-20513/nrf/releases_and_maturity/releases/release-notes-changelog.html

NordicBuilder · 2025-02-20T09:43:50Z

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peknis · 2025-02-20T10:16:05Z

doc/nrf/app_dev/device_guides/fem/fem_nrf21540_gpio_spi.rst

-#. On nRF53 devices, the devicetree nodes described above must be added to the network core and ``spi0`` instance of the network core must be used.
-   For the application core, you must also add a GPIO forwarder node to its devicetree file:
+#. On nRF53 devices, add the devicetree nodes described above to the network core.
+   Use ``spi0`` instance of the network core.


Suggested change

Use ``spi0`` instance of the network core.

Use the ``spi0`` instance of the network core.

peknis · 2025-02-20T10:16:23Z

doc/nrf/app_dev/device_guides/fem/fem_nrf21540_gpio_spi.rst

@@ -86,8 +86,9 @@ To use nRF21540 in GPIO+SPI mode, complete the following steps:

   In this example, the nRF21540 is controlled by the ``spi3`` bus.
   Replace the SPI bus according to your hardware design, and create alternative entries for SPI3 with different ``pinctrl-N`` and ``pinctrl-names`` properties.
-#. On nRF53 devices, the devicetree nodes described above must be added to the network core and ``spi0`` instance of the network core must be used.
-   For the application core, you must also add a GPIO forwarder node to its devicetree file:
+#. On nRF53 devices, add the devicetree nodes described above to the network core.


Suggested change

#. On nRF53 devices, add the devicetree nodes described above to the network core.

#. On nRF53 Series devices, add the devicetree nodes described above to the network core.

peknis · 2025-02-20T10:16:38Z

doc/nrf/app_dev/device_guides/fem/fem_nrf21540_gpio.rst

@@ -75,17 +75,17 @@ To use nRF21540 in GPIO mode, complete the following steps:

   The pins defined in the GPIO forwarder node in the application core's devicetree file must match the pins defined in the FEM nodes in the network core's devicetree file.

-#. On nRF54L devices, the GPIO pins of the SoC selected to control ``tx-en-gpios``, ``rx-en-gpios`` and ``pdn-gpios`` must support GPIOTE.
-   For example, on the nRF54L15 device, you can only use pins belonging to GPIO P1 or GPIO P0.
+#. On nRF54L devices, make sure the GPIO pins of the SoC selected to control ``tx-en-gpios``, ``rx-en-gpios`` and ``pdn-gpios`` support GPIOTE.


Suggested change

#. On nRF54L devices, make sure the GPIO pins of the SoC selected to control ``tx-en-gpios``, ``rx-en-gpios`` and ``pdn-gpios`` support GPIOTE.

#. On nRF54L Series devices, make sure the GPIO pins of the SoC selected to control ``tx-en-gpios``, ``rx-en-gpios`` and ``pdn-gpios`` support GPIOTE.

peknis · 2025-02-20T10:16:57Z

doc/nrf/app_dev/device_guides/fem/fem_nrf21540_gpio.rst

@@ -60,8 +60,8 @@ To use nRF21540 in GPIO mode, complete the following steps:

   The state of the remaining control pins should be set in other ways and according to `nRF21540 Product Specification`_.

-#. On nRF53 devices, the devicetree nodes described above must be added to the network core.
-   For the application core, you must also add a GPIO forwarder node to its devicetree file:
+#. On nRF53 devices, add the devicetree nodes described above to the network core.


Suggested change

#. On nRF53 devices, add the devicetree nodes described above to the network core.

#. On nRF53 Series devices, add the devicetree nodes described above to the network core.

peknis · 2025-02-20T10:18:01Z

doc/nrf/app_dev/device_guides/fem/fem_nrf21540_gpio_spi.rst

-   To enable the GPIO+SPI mode of operation, you must explicitly set the :kconfig:option:`CONFIG_MPSL_FEM_NRF21540_GPIO_SPI` Kconfig option to ``y``.
-   On an nRF5340, the :kconfig:option:`CONFIG_MPSL_FEM_NRF21540_GPIO_SPI` Kconfig option must be set to ``y`` for the network core image.
+   To enable the GPIO+SPI mode of operation, explicitly set the :kconfig:option:`CONFIG_MPSL_FEM_NRF21540_GPIO_SPI` Kconfig option to ``y``.
+   On an nRF5340, set the :kconfig:option:`CONFIG_MPSL_FEM_NRF21540_GPIO_SPI` Kconfig option to ``y`` for the network core image.


Suggested change

On an nRF5340, set the :kconfig:option:`CONFIG_MPSL_FEM_NRF21540_GPIO_SPI` Kconfig option to ``y`` for the network core image.

On an nRF5340 device, set the :kconfig:option:`CONFIG_MPSL_FEM_NRF21540_GPIO_SPI` Kconfig option to ``y`` for the network core image.

peknis · 2025-02-20T10:18:55Z

doc/nrf/app_dev/device_guides/fem/fem_nrf2220.rst

@@ -108,20 +109,21 @@ To use nRF2220, complete the following steps:

 #. On nRF53 devices, ``TWIM0`` and ``UARTE0`` are mutually exclusive AHB bus masters on the network core as described in the `Product Specification <nRF5340 Product Specification_>`_, Section 6.4.3.1, Table 22.


Suggested change

#. On nRF53 devices, ``TWIM0`` and ``UARTE0`` are mutually exclusive AHB bus masters on the network core as described in the `Product Specification <nRF5340 Product Specification_>`_, Section 6.4.3.1, Table 22.

#. On nRF53 Series devices, ``TWIM0`` and ``UARTE0`` are mutually exclusive AHB bus masters on the network core as described in the `Product Specification <nRF5340 Product Specification_>`_, Section 6.4.3.1, Table 22.

peknis · 2025-02-20T10:19:14Z

doc/nrf/app_dev/device_guides/fem/fem_nrf2220.rst

-#. On nRF54L devices, the GPIO pins of the SoC selected to control ``cs-gpios`` and ``md-gpios`` must support GPIOTE.
-   For example, on the nRF54L15 device, only pins belonging to GPIO P1 or GPIO P0 can be used and GPIO P2 pins cannot be used due to lack of related GPIOTE peripheral.
-   It is recommended for mentioned purpose to use these GPIO pins that belong to the PERI Power Domain of the nRF54L device.
+#. On nRF54L devices, make sure the GPIO pins of the SoC selected to control ``cs-gpios`` and ``md-gpios`` support GPIOTE.


Suggested change

#. On nRF54L devices, make sure the GPIO pins of the SoC selected to control ``cs-gpios`` and ``md-gpios`` support GPIOTE.

#. On nRF54L Series devices, make sure the GPIO pins of the SoC selected to control ``cs-gpios`` and ``md-gpios`` support GPIOTE.

peknis · 2025-02-20T10:19:56Z

doc/nrf/app_dev/device_guides/fem/fem_nrf2220.rst

+#. On nRF54L devices, make sure the GPIO pins of the SoC selected to control ``cs-gpios`` and ``md-gpios`` support GPIOTE.
+   For example, on the nRF54L15 device, use pins belonging to GPIO P1 or GPIO P0 only.
+   You cannot use the GPIO P2 pins, because there is no related GPIOTE peripheral.
+   It is recommended to use these GPIO pins that belong to the PERI Power Domain of the nRF54L device.


Suggested change

It is recommended to use these GPIO pins that belong to the PERI Power Domain of the nRF54L device.

It is recommended to use the GPIO pins that belong to the PERI Power Domain of the nRF54L device.

peknis · 2025-02-20T10:20:22Z

doc/nrf/app_dev/device_guides/fem/fem_nrf2220.rst

   For example, on the nRF54L15, these are pins belonging to GPIO P1.
   Using pins belonging to Low Power Domain (GPIO P0 on nRF54L15) is supported but requires more DPPI and PPIB channels of the SoC.
-   You must also enable appropriate instances of ``DPPIC`` and ``PPIB`` peripherals in the devicetree file:
+   Enable appropriate instances of ``DPPIC`` and ``PPIB`` peripherals in the devicetree file:


Suggested change

Enable appropriate instances of ``DPPIC`` and ``PPIB`` peripherals in the devicetree file:

Enable appropriate instances of the ``DPPIC`` and ``PPIB`` peripherals in the devicetree file:

peknis · 2025-02-20T10:20:40Z

doc/nrf/app_dev/device_guides/fem/fem_simple_gpio.rst

@@ -51,7 +51,7 @@ To use the Simple GPIO implementation of FEM with SKY66112-11, complete the foll
   The state of the other control pins should be set according to the SKY66112-11 documentation.
   See the official `SKY66112-11 page`_ for more information.

-#. On nRF53 devices, you must also apply the same devicetree node mentioned in **Step 1** to the network core using sysbuild.
+#. On nRF53 devices, apply the same devicetree node mentioned in **Step 1** to the network core using sysbuild.


Suggested change

#. On nRF53 devices, apply the same devicetree node mentioned in **Step 1** to the network core using sysbuild.

#. On nRF53 Series devices, apply the same devicetree node mentioned in **Step 1** to the network core using sysbuild.

ankuns · 2025-02-20T13:31:17Z

@peknis , I addressed what you pointed out, hopefully

peknis

Still a couple of nits.

peknis · 2025-02-20T13:59:26Z

doc/nrf/app_dev/device_guides/fem/fem_nrf21540_gpio_spi.rst

@@ -111,7 +112,7 @@ To use nRF21540 in GPIO+SPI mode, complete the following steps:

 #. On nRF53 devices, ``SPIM0`` and ``UARTE0`` are mutually exclusive AHB bus masters on the network core as described in the `Product Specification <nRF5340 Product Specification_>`_, Section 6.4.3.1, Table 22.


Suggested change

#. On nRF53 devices, ``SPIM0`` and ``UARTE0`` are mutually exclusive AHB bus masters on the network core as described in the `Product Specification <nRF5340 Product Specification_>`_, Section 6.4.3.1, Table 22.

#. On nRF53 Series devices, ``SPIM0`` and ``UARTE0`` are mutually exclusive AHB bus masters on the network core as described in the `Product Specification <nRF5340 Product Specification_>`_, Section 6.4.3.1, Table 22.

peknis · 2025-02-20T14:02:01Z

doc/nrf/app_dev/device_guides/fem/fem_nrf2220.rst

@@ -88,8 +88,9 @@ To use nRF2220, complete the following steps:
 #. The nRF2220 device supports alternative I2C slave address selection.
   Instead of using the default ``0x36`` I2C slave address for nRF2220 device you can use the value ``0x34``.
   In this case, the alternative address selection procedure when switching from ``Power Off`` to ``Bypass`` states of the nRF2220 is used automatically.
-#. On nRF53 devices, the devicetree nodes described above must be added to the network core and ``i2c0`` instance of the network core must be used.
-   For the application core, you must also add a GPIO forwarder node to its devicetree file to pass control over given pins from application core to the network core:
+#. On nRF53 Series devices, add the devicetree nodes described above the network core.


Line 86 -> On nRF54L Series devices

More imperative language is used to express steps needed to enable FEM support. Signed-off-by: Andrzej Kuros <[email protected]>

ankuns · 2025-02-20T14:08:37Z

@peknis , fixed those pointed under comment #20513 (review)

ankuns · 2025-02-20T14:14:43Z

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ankuns force-pushed the fem_improve_doc branch from fd79ce0 to b4692c8 Compare February 20, 2025 13:30

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doc improvements: fem: minor doc improvements

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More imperative language is used to express steps needed to enable FEM support. Signed-off-by: Andrzej Kuros <[email protected]>

ankuns force-pushed the fem_improve_doc branch from b4692c8 to 59e0df5 Compare February 20, 2025 14:08

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rlubos merged commit cf3f2c0 into nrfconnect:main Feb 20, 2025
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doc improvements: fem: minor doc improvements #20513

doc improvements: fem: minor doc improvements #20513

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ankuns commented Feb 20, 2025

	Use ``spi0`` instance of the network core.
	Use the ``spi0`` instance of the network core.

	#. On nRF53 devices, add the devicetree nodes described above to the network core.
	#. On nRF53 Series devices, add the devicetree nodes described above to the network core.

	#. On nRF54L devices, make sure the GPIO pins of the SoC selected to control ``tx-en-gpios``, ``rx-en-gpios`` and ``pdn-gpios`` support GPIOTE.
	#. On nRF54L Series devices, make sure the GPIO pins of the SoC selected to control ``tx-en-gpios``, ``rx-en-gpios`` and ``pdn-gpios`` support GPIOTE.

	On an nRF5340, set the :kconfig:option:`CONFIG_MPSL_FEM_NRF21540_GPIO_SPI` Kconfig option to ``y`` for the network core image.
	On an nRF5340 device, set the :kconfig:option:`CONFIG_MPSL_FEM_NRF21540_GPIO_SPI` Kconfig option to ``y`` for the network core image.

		@@ -108,20 +109,21 @@ To use nRF2220, complete the following steps:

		#. On nRF53 devices, ``TWIM0`` and ``UARTE0`` are mutually exclusive AHB bus masters on the network core as described in the `Product Specification <nRF5340 Product Specification_>`_, Section 6.4.3.1, Table 22.

	#. On nRF53 devices, ``TWIM0`` and ``UARTE0`` are mutually exclusive AHB bus masters on the network core as described in the `Product Specification <nRF5340 Product Specification_>`_, Section 6.4.3.1, Table 22.
	#. On nRF53 Series devices, ``TWIM0`` and ``UARTE0`` are mutually exclusive AHB bus masters on the network core as described in the `Product Specification <nRF5340 Product Specification_>`_, Section 6.4.3.1, Table 22.

	It is recommended to use these GPIO pins that belong to the PERI Power Domain of the nRF54L device.
	It is recommended to use the GPIO pins that belong to the PERI Power Domain of the nRF54L device.

	Enable appropriate instances of ``DPPIC`` and ``PPIB`` peripherals in the devicetree file:
	Enable appropriate instances of the ``DPPIC`` and ``PPIB`` peripherals in the devicetree file:

	#. On nRF53 devices, apply the same devicetree node mentioned in Step 1 to the network core using sysbuild.
	#. On nRF53 Series devices, apply the same devicetree node mentioned in Step 1 to the network core using sysbuild.

		@@ -111,7 +112,7 @@ To use nRF21540 in GPIO+SPI mode, complete the following steps:

		#. On nRF53 devices, ``SPIM0`` and ``UARTE0`` are mutually exclusive AHB bus masters on the network core as described in the `Product Specification <nRF5340 Product Specification_>`_, Section 6.4.3.1, Table 22.

	#. On nRF53 devices, ``SPIM0`` and ``UARTE0`` are mutually exclusive AHB bus masters on the network core as described in the `Product Specification <nRF5340 Product Specification_>`_, Section 6.4.3.1, Table 22.
	#. On nRF53 Series devices, ``SPIM0`` and ``UARTE0`` are mutually exclusive AHB bus masters on the network core as described in the `Product Specification <nRF5340 Product Specification_>`_, Section 6.4.3.1, Table 22.

doc improvements: fem: minor doc improvements #20513

doc improvements: fem: minor doc improvements #20513

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