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std_detect: Remove /proc/cpuinfo-based detection #1747

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4 changes: 2 additions & 2 deletions crates/std_detect/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -41,7 +41,7 @@ is undefined.
have the minimum supported API level higher than [Android 4.3 (API level 18) that added `getauxval`](https://github.com/aosp-mirror/platform_bionic/blob/d3ebc2f7c49a9893b114124d4a6b315f3a328764/libc/include/sys/auxv.h#L49).

* `std_detect_file_io` (enabled by default, requires `std`): Enable to perform run-time feature
detection using file APIs (e.g. `/proc/cpuinfo`, etc.) if other more performant
detection using file APIs (e.g. `/proc/self/auxv`, etc.) if other more performant
methods fail. This feature requires `libstd` as a dependency, preventing the
crate from working on applications in which `std` is not available.

Expand All @@ -58,7 +58,7 @@ crate from working on applications in which `std` is not available.
* Linux/Android:
* `arm{32, 64}`, `mips{32,64}{,el}`, `powerpc{32,64}{,le}`, `loongarch64`, `s390x`:
`std_detect` supports these on Linux by querying ELF auxiliary vectors (using `getauxval`
when available), and if that fails, by querying `/proc/cpuinfo`.
when available), and if that fails, by querying `/proc/self/auxv`.
* `arm64`: partial support for doing run-time feature detection by directly
querying `mrs` is implemented for Linux >= 4.11, but not enabled by default.
* `riscv{32,64}`:
Expand Down
119 changes: 1 addition & 118 deletions crates/std_detect/src/detect/os/linux/aarch64.rs
Original file line number Diff line number Diff line change
Expand Up @@ -3,8 +3,7 @@
use super::auxvec;
use crate::detect::{Feature, bit, cache};

/// Try to read the features from the auxiliary vector, and if that fails, try
/// to read them from /proc/cpuinfo.
/// Try to read the features from the auxiliary vector.
pub(crate) fn detect_features() -> cache::Initializer {
#[cfg(target_os = "android")]
let is_exynos9810 = {
Expand All @@ -27,11 +26,6 @@ pub(crate) fn detect_features() -> cache::Initializer {
let hwcap: AtHwcap = auxv.into();
return hwcap.cache(is_exynos9810);
}
#[cfg(feature = "std_detect_file_io")]
if let Ok(c) = super::cpuinfo::CpuInfo::new() {
let hwcap: AtHwcap = c.into();
return hwcap.cache(is_exynos9810);
}
cache::Initializer::default()
}

Expand Down Expand Up @@ -249,117 +243,6 @@ impl From<auxvec::AuxVec> for AtHwcap {
}
}

#[cfg(feature = "std_detect_file_io")]
impl From<super::cpuinfo::CpuInfo> for AtHwcap {
/// Reads AtHwcap from /proc/cpuinfo .
fn from(c: super::cpuinfo::CpuInfo) -> Self {
let f = &c.field("Features");
AtHwcap {
// 64-bit names. FIXME: In 32-bit compatibility mode /proc/cpuinfo will
// map some of the 64-bit names to some 32-bit feature names. This does not
// cover that yet.
fp: f.has("fp"),
asimd: f.has("asimd"),
// evtstrm: f.has("evtstrm"),
aes: f.has("aes"),
pmull: f.has("pmull"),
sha1: f.has("sha1"),
sha2: f.has("sha2"),
crc32: f.has("crc32"),
atomics: f.has("atomics"),
fphp: f.has("fphp"),
asimdhp: f.has("asimdhp"),
// cpuid: f.has("cpuid"),
asimdrdm: f.has("asimdrdm"),
jscvt: f.has("jscvt"),
fcma: f.has("fcma"),
lrcpc: f.has("lrcpc"),
dcpop: f.has("dcpop"),
sha3: f.has("sha3"),
sm3: f.has("sm3"),
sm4: f.has("sm4"),
asimddp: f.has("asimddp"),
sha512: f.has("sha512"),
sve: f.has("sve"),
fhm: f.has("asimdfhm"),
dit: f.has("dit"),
uscat: f.has("uscat"),
ilrcpc: f.has("ilrcpc"),
flagm: f.has("flagm"),
ssbs: f.has("ssbs"),
sb: f.has("sb"),
paca: f.has("paca"),
pacg: f.has("pacg"),

// AT_HWCAP2
dcpodp: f.has("dcpodp"),
sve2: f.has("sve2"),
sveaes: f.has("sveaes"),
svepmull: f.has("svepmull"),
svebitperm: f.has("svebitperm"),
svesha3: f.has("svesha3"),
svesm4: f.has("svesm4"),
flagm2: f.has("flagm2"),
frint: f.has("frint"),
// svei8mm: f.has("svei8mm"),
svef32mm: f.has("svef32mm"),
svef64mm: f.has("svef64mm"),
// svebf16: f.has("svebf16"),
i8mm: f.has("i8mm"),
bf16: f.has("bf16"),
// dgh: f.has("dgh"),
rng: f.has("rng"),
bti: f.has("bti"),
mte: f.has("mte"),
ecv: f.has("ecv"),
// afp: f.has("afp"),
// rpres: f.has("rpres"),
// mte3: f.has("mte3"),
sme: f.has("sme"),
smei16i64: f.has("smei16i64"),
smef64f64: f.has("smef64f64"),
// smei8i32: f.has("smei8i32"),
// smef16f32: f.has("smef16f32"),
// smeb16f32: f.has("smeb16f32"),
// smef32f32: f.has("smef32f32"),
smefa64: f.has("smefa64"),
wfxt: f.has("wfxt"),
// ebf16: f.has("ebf16"),
// sveebf16: f.has("sveebf16"),
cssc: f.has("cssc"),
// rprfm: f.has("rprfm"),
sve2p1: f.has("sve2p1"),
sme2: f.has("sme2"),
sme2p1: f.has("sme2p1"),
// smei16i32: f.has("smei16i32"),
// smebi32i32: f.has("smebi32i32"),
smeb16b16: f.has("smeb16b16"),
smef16f16: f.has("smef16f16"),
mops: f.has("mops"),
hbc: f.has("hbc"),
sveb16b16: f.has("sveb16b16"),
lrcpc3: f.has("lrcpc3"),
lse128: f.has("lse128"),
fpmr: f.has("fpmr"),
lut: f.has("lut"),
faminmax: f.has("faminmax"),
f8cvt: f.has("f8cvt"),
f8fma: f.has("f8fma"),
f8dp4: f.has("f8dp4"),
f8dp2: f.has("f8dp2"),
f8e4m3: f.has("f8e4m3"),
f8e5m2: f.has("f8e5m2"),
smelutv2: f.has("smelutv2"),
smef8f16: f.has("smef8f16"),
smef8f32: f.has("smef8f32"),
smesf8fma: f.has("smesf8fma"),
smesf8dp4: f.has("smesf8dp4"),
smesf8dp2: f.has("smesf8dp2"),
// pauthlr: f.has("pauthlr"),
}
}
}

impl AtHwcap {
/// Initializes the cache from the feature -bits.
///
Expand Down
39 changes: 1 addition & 38 deletions crates/std_detect/src/detect/os/linux/arm.rs
Original file line number Diff line number Diff line change
Expand Up @@ -3,8 +3,7 @@
use super::auxvec;
use crate::detect::{Feature, bit, cache};

/// Try to read the features from the auxiliary vector, and if that fails, try
/// to read them from /proc/cpuinfo.
/// Try to read the features from the auxiliary vector.
pub(crate) fn detect_features() -> cache::Initializer {
let mut value = cache::Initializer::default();
let enable_feature = |value: &mut cache::Initializer, f, enable| {
Expand All @@ -31,41 +30,5 @@ pub(crate) fn detect_features() -> cache::Initializer {
);
return value;
}

#[cfg(feature = "std_detect_file_io")]
if let Ok(c) = super::cpuinfo::CpuInfo::new() {
enable_feature(
&mut value,
Feature::neon,
c.field("Features").has("neon") && !has_broken_neon(&c),
);
enable_feature(&mut value, Feature::i8mm, c.field("Features").has("i8mm"));
enable_feature(
&mut value,
Feature::dotprod,
c.field("Features").has("asimddp"),
);
enable_feature(&mut value, Feature::pmull, c.field("Features").has("pmull"));
enable_feature(&mut value, Feature::crc, c.field("Features").has("crc32"));
enable_feature(&mut value, Feature::aes, c.field("Features").has("aes"));
enable_feature(
&mut value,
Feature::sha2,
c.field("Features").has("sha1") && c.field("Features").has("sha2"),
);
return value;
}
value
}

/// Is the CPU known to have a broken NEON unit?
///
/// See https://crbug.com/341598.
#[cfg(feature = "std_detect_file_io")]
fn has_broken_neon(cpuinfo: &super::cpuinfo::CpuInfo) -> bool {
cpuinfo.field("CPU implementer") == "0x51"
&& cpuinfo.field("CPU architecture") == "7"
&& cpuinfo.field("CPU variant") == "0x1"
&& cpuinfo.field("CPU part") == "0x04d"
&& cpuinfo.field("CPU revision") == "0"
}
4 changes: 1 addition & 3 deletions crates/std_detect/src/detect/os/linux/auxvec.rs
Original file line number Diff line number Diff line change
Expand Up @@ -53,9 +53,7 @@ pub(crate) struct AuxVec {
/// - If that fails, this function returns an error.
///
/// Note that run-time feature detection is not invoked for features that can
/// be detected at compile-time. Also note that if this function returns an
/// error, cpuinfo still can (and will) be used to try to perform run-time
/// feature detection on some platforms.
/// be detected at compile-time.
///
/// Note: The `std_detect_dlsym_getauxval` cargo feature is ignored on
/// `*-linux-{gnu,musl,ohos}*` and `*-android*` targets because we can safely assume `getauxval`
Expand Down
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