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Add a Cargo Feature for Enabling SSE #77

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Merged
merged 11 commits into from
Sep 21, 2019
Merged
2 changes: 2 additions & 0 deletions Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,7 @@ xmas-elf = { version = "0.6.2", optional = true }
x86_64 = { version = "0.7.2", optional = true }
usize_conversions = { version = "0.2.0", optional = true }
fixedvec = { version = "0.2.4", optional = true }
bit_field = "*"
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Wildcard dependencies are not recommended because cargo might select an incompatible version. For example, it can lead to compilation failures when another dependency requires a very old version of bit_field. Just set it to the latest version (0.10.0) instead.

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Also, please make this dependency optional like the other dependencies above.


[dependencies.font8x8]
version = "0.2.4"
Expand All @@ -34,6 +35,7 @@ binary = ["xmas-elf", "x86_64", "usize_conversions", "fixedvec", "llvm-tools", "
vga_320x200 = ["font8x8"]
recursive_page_table = []
map_physical_memory = []
sse = []
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After making the bit_field dependency optional, you need to change this line to

Suggested change
sse = []
sse = ["bit_field"]


[profile.dev]
panic = "abort"
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5 changes: 5 additions & 0 deletions example-kernel/Cargo.lock

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2 changes: 1 addition & 1 deletion example-kernel/src/main.rs
Original file line number Diff line number Diff line change
Expand Up @@ -11,7 +11,7 @@ pub extern "C" fn _start() -> ! {
// named `_start` by default

let vga_buffer = 0xb8000 as *mut u8;

// print `HELLO` to the screen (see
// https://os.phil-opp.com/minimal-rust-kernel/#printing-to-screen)
for (i, &byte) in HELLO.iter().enumerate() {
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24 changes: 24 additions & 0 deletions src/main.rs
Original file line number Diff line number Diff line change
Expand Up @@ -87,6 +87,30 @@ extern "C" {

#[no_mangle]
pub unsafe extern "C" fn stage_4() -> ! {
#[cfg(feature = "sse")]
{
use bit_field::BitField;
use x86_64::registers::control::Cr0;
let mut flags = Cr0::read_raw();
flags.set_bit(2, false);
flags.set_bit(1, true);
flags.set_bit(9, true);
flags.set_bit(10, true);
unsafe {
Cr0::write_raw(flags);
}
// For now, we must use inline ASM here
let mut cr4: u64;
unsafe {
asm!("mov %cr4, $0" : "=r" (cr4));
}
cr4.set_bit(9, true);
cr4.set_bit(10, true);
unsafe {
asm!("mov $0, %cr4" :: "r" (cr4) : "memory");
}
}

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Could you move this into an enable_sse function in a new sse module? Also, it should be called from main, not stage_4.

// Set stack segment
asm!("mov bx, 0x0
mov ss, bx" ::: "bx" : "intel");
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1 change: 0 additions & 1 deletion src/stage_2.s
Original file line number Diff line number Diff line change
Expand Up @@ -95,7 +95,6 @@ enter_protected_mode_again:
mov eax, cr0
or al, 1 # set protected mode bit
mov cr0, eax

push 0x8
lea eax, [stage_3]
push eax
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5 changes: 5 additions & 0 deletions test-kernel/Cargo.lock

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1 change: 1 addition & 0 deletions test-kernel/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -6,3 +6,4 @@ edition = "2018"

[dependencies]
x86_64 = "0.3.4"
bootloader = {path = "..", features=["sse"]}
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I'm not sure if this is a good way to test it because we no longer test it without the sse feature this way. Instead we should create multiple test kernels with different feature combinations like we do for bootimage. This does not need to be part of this PR, though.

I think the best way forward is to merge this without tests (undoing the modifications to the test-kernel) and add proper tests in a follow-up pull request.