Aarch64 performance fixes #33
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Mainly two things:
The fixed loop of four 128-bit chunks was not automatically unrolled. It is hand-unrolled now. This does not change the assembly output on x64.
The vld1q_u8 intrinsic is broken. The compiler thinks it can "optimize" loads by loading bytes individually if a SIMD shuffle instruction follows. According to the ARM docs it should be coded as one instruction. This had an effect on the code when the loop was manually unrolled. Workaround: see code.
Issue filed: Aarch64 performance:
vld1q_u8intrinsic can cause single-byte loads rust-lang/stdarch#1148