chore(release): Release version 0.1.2

.bumpversion.toml

@@ -3,7 +3,7 @@
 # SPDX-License-Identifier: Apache-2.0 OR MIT
 
 [tool.bumpversion]
-current_version = "0.1.1"
+current_version = "0.1.2"
 
 [[tool.bumpversion.files]]
 filename = "README.md"

.github/workflows/CI.yaml

@@ -24,7 +24,7 @@ jobs:
           - aarch64-apple-darwin
           - x86_64-pc-windows-msvc
         toolchain:
-          - 1.61.0 # MSRV
+          - 1.67.0 # MSRV
           - stable
         include:
           - target: x86_64-unknown-linux-gnu
@@ -58,7 +58,7 @@ jobs:
           - aarch64-apple-darwin
           - x86_64-pc-windows-msvc
         toolchain:
-          - 1.61.0
+          - 1.67.0
           - stable
         include:
           - target: x86_64-unknown-linux-gnu

.github/workflows/REUSE.yaml

@@ -19,4 +19,4 @@ jobs:
       - name: Checkout code
         uses: actions/checkout@v4
       - name: REUSE Compliance Check
-        uses: fsfe/reuse-action@v4.0.0
+        uses: fsfe/reuse-action@v5.0.0

CHANGELOG.adoc

@@ -14,6 +14,29 @@ All notable changes to this project will be documented in this file.
 The format is based on https://keepachangelog.com/[Keep a Changelog], and this
 project adheres to https://semver.org/[Semantic Versioning].
 
+== {compare-url}/v0.1.1\...v0.1.2[0.1.2] - 2024-11-30
+
+=== Added
+
+* Add `BitInt::checked_ilog` and `BitUint::checked_ilog`
+  ({pull-request-url}/12[#12])
+* Add `BitInt::checked_ilog2` and `BitUint::checked_ilog2`
+  ({pull-request-url}/12[#12])
+* Add `BitInt::checked_ilog10` and `BitUint::checked_ilog10`
+  ({pull-request-url}/12[#12])
+* Add `BitInt::checked_div_euclid` and `BitUint::checked_div_euclid`
+  ({pull-request-url}/14[#14])
+* Add `BitInt::checked_rem_euclid` and `BitUint::checked_rem_euclid`
+  ({pull-request-url}/14[#14])
+* Add `BitInt::checked_shl` and `BitUint::checked_shl`
+  ({pull-request-url}/14[#14])
+* Add `BitInt::checked_shr` and `BitUint::checked_shr`
+  ({pull-request-url}/14[#14])
+
+=== Changed
+
+* Bump MSRV to 1.67.0 ({pull-request-url}/12[#12])
+
 == {compare-url}/v0.1.0\...v0.1.1[0.1.1] - 2024-11-14
 
 === Added

Cargo.toml

@@ -4,10 +4,10 @@
 
 [package]
 name = "bit-int"
-version = "0.1.1"
+version = "0.1.2"
 authors = ["Shun Sakai <[email protected]>"]
 edition = "2021"
-rust-version = "1.61.0"
+rust-version = "1.67.0"
 description = "An arbitrary fixed bit-width integer library"
 documentation = "https://docs.rs/bit-int"
 readme = "README.md"

README.md

@@ -21,7 +21,7 @@ Add this to your `Cargo.toml`:
 
 ```toml
 [dependencies]
-bit-int = "0.1.1"
+bit-int = "0.1.2"
 ```
 
 ### Documentation
@@ -30,7 +30,7 @@ See the [documentation][docs-url] for more details.
 
 ## Minimum supported Rust version
 
-The minimum supported Rust version (MSRV) of this library is v1.61.0.
+The minimum supported Rust version (MSRV) of this library is v1.67.0.
 
 ## Source code
 

benches/ops.rs

@@ -65,6 +65,20 @@ fn checked_div_bit_uint(b: &mut Bencher) {
     b.iter(|| n.checked_div(2));
 }
 
+#[bench]
+fn checked_div_euclid_bit_int(b: &mut Bencher) {
+    let n = BitI32::<31>::new(42).unwrap();
+
+    b.iter(|| n.checked_div_euclid(2));
+}
+
+#[bench]
+fn checked_div_euclid_bit_uint(b: &mut Bencher) {
+    let n = BitU32::<31>::new(42).unwrap();
+
+    b.iter(|| n.checked_div_euclid(2));
+}
+
 #[bench]
 fn checked_rem_bit_int(b: &mut Bencher) {
     let n = BitI32::<31>::new(5).unwrap();
@@ -79,6 +93,62 @@ fn checked_rem_bit_uint(b: &mut Bencher) {
     b.iter(|| n.checked_rem(2));
 }
 
+#[bench]
+fn checked_rem_euclid_bit_int(b: &mut Bencher) {
+    let n = BitI32::<31>::new(5).unwrap();
+
+    b.iter(|| n.checked_rem_euclid(2));
+}
+
+#[bench]
+fn checked_rem_euclid_bit_uint(b: &mut Bencher) {
+    let n = BitU32::<31>::new(5).unwrap();
+
+    b.iter(|| n.checked_rem_euclid(2));
+}
+
+#[bench]
+fn checked_ilog_bit_int(b: &mut Bencher) {
+    let n = BitI32::<31>::new(5).unwrap();
+
+    b.iter(|| n.checked_ilog(5));
+}
+
+#[bench]
+fn checked_ilog_bit_uint(b: &mut Bencher) {
+    let n = BitU32::<31>::new(5).unwrap();
+
+    b.iter(|| n.checked_ilog(5));
+}
+
+#[bench]
+fn checked_ilog2_bit_int(b: &mut Bencher) {
+    let n = BitI32::<31>::new(2).unwrap();
+
+    b.iter(|| n.checked_ilog2());
+}
+
+#[bench]
+fn checked_ilog2_bit_uint(b: &mut Bencher) {
+    let n = BitU32::<31>::new(2).unwrap();
+
+    b.iter(|| n.checked_ilog2());
+}
+
+#[bench]
+fn checked_ilog10_bit_int(b: &mut Bencher) {
+    let n = BitI32::<31>::new(10).unwrap();
+
+    b.iter(|| n.checked_ilog10());
+}
+
+#[bench]
+fn checked_ilog10_bit_uint(b: &mut Bencher) {
+    let n = BitU32::<31>::new(10).unwrap();
+
+    b.iter(|| n.checked_ilog10());
+}
+
 #[bench]
 fn checked_neg_bit_int(b: &mut Bencher) {
     let n = BitI32::<31>::new(5).unwrap();
@@ -93,6 +163,34 @@ fn checked_neg_bit_uint(b: &mut Bencher) {
     b.iter(|| n.checked_neg());
 }
 
+#[bench]
+fn checked_shl_bit_int(b: &mut Bencher) {
+    let n = BitI32::<31>::new(0x01).unwrap();
+
+    b.iter(|| n.checked_shl(4));
+}
+
+#[bench]
+fn checked_shl_bit_uint(b: &mut Bencher) {
+    let n = BitU32::<31>::new(0x01).unwrap();
+
+    b.iter(|| n.checked_shl(4));
+}
+
+#[bench]
+fn checked_shr_bit_int(b: &mut Bencher) {
+    let n = BitI32::<31>::new(0x10).unwrap();
+
+    b.iter(|| n.checked_shr(4));
+}
+
+#[bench]
+fn checked_shr_bit_uint(b: &mut Bencher) {
+    let n = BitU32::<31>::new(0x10).unwrap();
+
+    b.iter(|| n.checked_shr(4));
+}
+
 #[bench]
 fn checked_abs(b: &mut Bencher) {
     let n = BitI32::<31>::new(-5).unwrap();

clippy.toml

@@ -2,4 +2,4 @@
 #
 # SPDX-License-Identifier: Apache-2.0 OR MIT
 
-msrv = "1.61.0"
+msrv = "1.67.0"