Config changes

src/main/scala/gemmini/Configs.scala

@@ -243,6 +243,11 @@ object GemminiConfigs {
 
   val ReducedNVDLAConfig =  defaultConfig.copy(meshRows = 1,  meshColumns = 1, tileRows = 4, tileColumns = 4)
 
+  val gemvConfig =  defaultConfig.copy(
+    tileRows=1, tileColumns=16,
+    meshRows=16, meshColumns=1
+  )
+
 }
 
 /**
@@ -396,4 +401,16 @@ class ReducedNVDLAGemminiConfig[T <: Data : Arithmetic, U <: Data, V <: Data](
       gemmini
     }
   )
+})
+
+class GemvGemminiConfig[T <: Data : Arithmetic, U <: Data, V <: Data](
+  gemminiConfig: GemminiArrayConfig[T,U,V] = GemminiConfigs.gemvConfig
+) extends Config((site, here, up) => {
+  case BuildRoCC => up(BuildRoCC) ++ Seq(
+    (p: Parameters) => {
+      implicit val q = p
+      val gemmini = LazyModule(new Gemmini(gemminiConfig))
+      gemmini
+    }
+  )
 })

src/main/scala/gemmini/MeshWithDelays.scala

@@ -155,7 +155,9 @@ class MeshWithDelays[T <: Data: Arithmetic, U <: TagQueueTag with Data]
   val transposer = Module(new AlwaysOutTransposer(block_size, inputType))
 
   transposer.io.inRow.valid := !pause && (a_is_from_transposer || b_is_from_transposer || d_is_from_transposer)
-  transposer.io.inRow.bits := MuxCase(VecInit(b_buf.flatten), Seq(
+  println(s"!!! ${a_buf.size} ${a_buf.head.size} ${b_buf.size}")
+  // TODO: Handle the case where the tileRows isn't 1, add assesrtion
+  transposer.io.inRow.bits := MuxCase(VecInit(a_buf.asTypeOf(Vec(meshRows, Vec(tileRows, inputType))).flatten), Seq(
     b_is_from_transposer -> VecInit(b_buf.flatten),
     d_is_from_transposer -> VecInit(d_buf.flatten.reverse),
   ))