arch/risc-v: fix compilation issues

This fixes compilation issues ariased from some RISC-V devices. Signed-off-by: Yanfeng Liu <[email protected]>
yf13 · Jun 11, 2024 · db66396 · db66396
1 parent ad4a523
commit db66396
Show file tree

Hide file tree

Showing 2 changed files with 2 additions and 2 deletions.
diff --git a/arch/risc-v/src/bl602/bl602_irq_dispatch.c b/arch/risc-v/src/bl602/bl602_irq_dispatch.c
@@ -41,7 +41,7 @@
  * riscv_dispatch_irq
  ****************************************************************************/
 
-void *riscv_dispatch_irq(uintptr_t vector, uintptr_t *regs)
+void *riscv_dispatch_irq(uintptr_t vector, uintreg_t *regs)
 {
   int irq  = vector & 0x3ff; /* E24 [9:0] */
 

diff --git a/arch/risc-v/src/esp32c3-legacy/esp32c3_irq.c b/arch/risc-v/src/esp32c3-legacy/esp32c3_irq.c
@@ -636,7 +636,7 @@ uint32_t *riscv_int_decode(uint32_t cpuints, uint32_t *regs)
  *
  ****************************************************************************/
 
-IRAM_ATTR uintptr_t *riscv_dispatch_irq(uintptr_t mcause, uintptr_t *regs)
+IRAM_ATTR uintptr_t *riscv_dispatch_irq(uintptr_t mcause, uintreg_t *regs)
 {
   int irq;
   uint8_t cpuint = mcause & RISCV_IRQ_MASK;