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soc: arm: xilinx_zynq7000: add MMU PTEs for all AXI GPIO instances #46463

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Merged
merged 1 commit into from
Aug 15, 2022
Merged

soc: arm: xilinx_zynq7000: add MMU PTEs for all AXI GPIO instances #46463

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7 changes: 7 additions & 0 deletions soc/arm/xilinx_zynq7000/xc7zxxx/soc.c
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Original file line number Diff line number Diff line change
Expand Up @@ -15,6 +15,11 @@
/* System Level Control Registers (SLCR) */
#define SLCR_UNLOCK 0x0008
#define SLCR_UNLOCK_KEY 0xdf0d
#define AXI_GPIO_MMU_ENTRY(id)\
MMU_REGION_FLAT_ENTRY("axigpio",\
DT_REG_ADDR(id),\
DT_REG_SIZE(id),\
MT_DEVICE | MATTR_SHARED | MPERM_R | MPERM_W),

static const struct arm_mmu_region mmu_regions[] = {

Expand Down Expand Up @@ -68,6 +73,8 @@ static const struct arm_mmu_region mmu_regions[] = {
MT_DEVICE | MATTR_SHARED | MPERM_R | MPERM_W),
#endif

DT_FOREACH_STATUS_OKAY(xlnx_xps_gpio_1_00_a, AXI_GPIO_MMU_ENTRY)

};

const struct arm_mmu_config mmu_config = {
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7 changes: 7 additions & 0 deletions soc/arm/xilinx_zynq7000/xc7zxxxs/soc.c
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Original file line number Diff line number Diff line change
Expand Up @@ -15,6 +15,11 @@
/* System Level Configuration Registers */
#define SLCR_UNLOCK 0x0008
#define SLCR_UNLOCK_KEY 0xdf0d
#define AXI_GPIO_MMU_ENTRY(id)\
MMU_REGION_FLAT_ENTRY("axigpio",\
DT_REG_ADDR(id),\
DT_REG_SIZE(id),\
MT_DEVICE | MATTR_SHARED | MPERM_R | MPERM_W),

static const struct arm_mmu_region mmu_regions[] = {

Expand Down Expand Up @@ -68,6 +73,8 @@ static const struct arm_mmu_region mmu_regions[] = {
MT_DEVICE | MATTR_SHARED | MPERM_R | MPERM_W),
#endif

DT_FOREACH_STATUS_OKAY(xlnx_xps_gpio_1_00_a, AXI_GPIO_MMU_ENTRY)

};

const struct arm_mmu_config mmu_config = {
Expand Down