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likeamahoneyYan Churkin
andauthored
[ImportVerilog] Fix bugs with constant folding (#8213)
Co-authored-by: Yan Churkin <[email protected]>
1 parent 6e93a0e commit 2d2bee8

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4 files changed

+36
-10
lines changed

4 files changed

+36
-10
lines changed

include/circt/Dialect/Moore/MooreOps.td

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -489,7 +489,7 @@ def ConstantOp : MooreOp<"constant", [Pure, ConstantLike]> {
489489
let builders = [
490490
OpBuilder<(ins "IntType":$type, "const FVInt &":$value)>,
491491
OpBuilder<(ins "IntType":$type, "const APInt &":$value)>,
492-
OpBuilder<(ins "IntType":$type, "int64_t":$value)>,
492+
OpBuilder<(ins "IntType":$type, "int64_t":$value, CArg<"bool", "true">:$isSigned)>,
493493
];
494494
}
495495

lib/Conversion/ImportVerilog/Expressions.cpp

Lines changed: 8 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -432,7 +432,8 @@ struct RvalueExprVisitor {
432432

433433
Value getSelectIndex(Value index, const slang::ConstantRange &range) const {
434434
auto indexType = cast<moore::UnpackedType>(index.getType());
435-
auto bw = std::max(llvm::Log2_32_Ceil(std::abs(range.upper())),
435+
auto bw = std::max(llvm::Log2_32_Ceil(std::max(std::abs(range.lower()),
436+
std::abs(range.upper()))),
436437
indexType.getBitSize().value());
437438
auto intType =
438439
moore::IntType::get(index.getContext(), bw, indexType.getDomain());
@@ -443,8 +444,8 @@ struct RvalueExprVisitor {
443444

444445
Value newIndex =
445446
builder.createOrFold<moore::ConversionOp>(loc, intType, index);
446-
Value offset =
447-
builder.create<moore::ConstantOp>(loc, intType, range.lower());
447+
Value offset = builder.create<moore::ConstantOp>(
448+
loc, intType, range.lower(), /*isSigned = */ range.lower() < 0);
448449
return builder.createOrFold<moore::SubOp>(loc, newIndex, offset);
449450
}
450451

@@ -453,8 +454,8 @@ struct RvalueExprVisitor {
453454

454455
Value newIndex =
455456
builder.createOrFold<moore::ConversionOp>(loc, intType, index);
456-
Value offset =
457-
builder.create<moore::ConstantOp>(loc, intType, range.upper());
457+
Value offset = builder.create<moore::ConstantOp>(
458+
loc, intType, range.upper(), /* isSigned = */ range.upper() < 0);
458459
return builder.createOrFold<moore::SubOp>(loc, offset, newIndex);
459460
}
460461

@@ -529,8 +530,8 @@ struct RvalueExprVisitor {
529530
subtrahendType.getDomain());
530531
auto sliceWidth =
531532
expr.right().constant->integer().as<uint32_t>().value() - 1;
532-
auto minuend =
533-
builder.create<moore::ConstantOp>(loc, intType, sliceWidth);
533+
auto minuend = builder.create<moore::ConstantOp>(
534+
loc, intType, sliceWidth, expr.left().type->isSigned());
534535
dynLowBit = builder.create<moore::SubOp>(loc, subtrahend, minuend);
535536
}
536537
} else {

lib/Dialect/Moore/MooreOps.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -623,9 +623,9 @@ void ConstantOp::build(OpBuilder &builder, OperationState &result, IntType type,
623623
/// folding because it only works with values that can be expressed in an
624624
/// `int64_t`.
625625
void ConstantOp::build(OpBuilder &builder, OperationState &result, IntType type,
626-
int64_t value) {
626+
int64_t value, bool isSigned) {
627627
build(builder, result, type,
628-
APInt(type.getWidth(), (uint64_t)value, /*isSigned=*/true));
628+
APInt(type.getWidth(), (uint64_t)value, isSigned));
629629
}
630630

631631
OpFoldResult ConstantOp::fold(FoldAdaptor adaptor) {

test/Conversion/ImportVerilog/basic.sv

Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2344,3 +2344,28 @@ function int AssignFuncArgs2(int x, int y);
23442344
// CHECK: [[ADD:%.+]] = moore.add [[READ_X]], [[READ_Y]] : i32
23452345
return x+y;
23462346
endfunction
2347+
2348+
// CHECK-LABEL: moore.module @RangeElementSelection(
2349+
module RangeElementSelection(
2350+
input reg [3:0] a [0:2],
2351+
output reg [3:0] b,
2352+
input reg [1:0] c);
2353+
// CHECK: [[A:%.+]] = moore.variable name "a" : <uarray<3 x l4>
2354+
// CHECK: [[C:%.+]] = moore.variable name "c" : <l2>
2355+
2356+
always_comb begin
2357+
// CHECK: [[READ_A:%.+]] = moore.read [[A]] : <uarray<3 x l4>>
2358+
// CHECK: [[READ_C:%.+]] = moore.read [[C]] : <l2>
2359+
// CHECK: [[M2:%.+]] = moore.constant -2 : l2
2360+
// CHECK: [[SUB_1:%.+]] = moore.sub [[M2]], [[READ_C]] : l2
2361+
// CHECK: [[DYN_EXT_1:%.+]] = moore.dyn_extract [[READ_A]] from [[SUB_1]] : uarray<3 x l4>, l2 -> l4
2362+
// CHECK: [[READ_B:%.+]] = moore.read %b : <l4>
2363+
// CHECK: [[READ_C_1:%.+]] = moore.read [[C]] : <l2>
2364+
// CHECK: [[EXTRACT:%.+]] = moore.extract [[READ_C_1]] from 0 : l2 -> l1
2365+
// CHECK: [[ONE:%.+]] = moore.constant 1 : l1
2366+
// CHECK: [[SUB_2:%.+]] = moore.sub [[EXTRACT]], [[ONE]] : l1
2367+
// CHECK: [[DYN_EXT_2:%.+]] = moore.dyn_extract [[READ_B]] from [[SUB_2]] : l4, l1 -> l2
2368+
b = a[c];
2369+
b[3:0] = b[c[0]-:2];
2370+
end
2371+
endmodule

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