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[sw,dif] Port rstmgr_cpu_info_test to DT & update pwrmgr/rstmgr difs for DJ #6069

[sw,dif] Port rstmgr_cpu_info_test to DT & update pwrmgr/rstmgr difs for DJ

[sw,dif] Port rstmgr_cpu_info_test to DT & update pwrmgr/rstmgr difs for DJ #6069

Triggered via pull request February 14, 2025 17:17
Status Success
Total duration 8h 34m 26s
Artifacts 31

ci.yml

on: pull_request
Earl Grey for CW310  /  Build bitstream
1h 6m
Earl Grey for CW310 / Build bitstream
Earl Grey for CW310 Hyperdebug  /  Build bitstream
2m 41s
Earl Grey for CW310 Hyperdebug / Build bitstream
Earl Grey for CW340  /  Build bitstream
2m 46s
Earl Grey for CW340 / Build bitstream
Lint (slow)
11m 2s
Lint (slow)
Build documentation
5m 8s
Build documentation
Airgapped build
11m 4s
Airgapped build
Verible lint
1m 10s
Verible lint
Run OTBN smoke Test
3m 1s
Run OTBN smoke Test
Run OTBN crypto tests
2m 54s
Run OTBN crypto tests
Verilated English Breakfast
3m 28s
Verilated English Breakfast
Verilated Earl Grey
56m 48s
Verilated Earl Grey
CW305's Bitstream
2m 25s
CW305's Bitstream
Build Docker Containers
2m 34s
Build Docker Containers
Build and test software
16m 7s
Build and test software
Build and test Darjeeling software
3m 21s
Build and test Darjeeling software
QEMU smoketest
2m 1s
QEMU smoketest
CW310 Test ROM Tests  /  FPGA test
3m 46s
CW310 Test ROM Tests / FPGA test
CW310 ROM Tests  /  FPGA test
40m 8s
CW310 ROM Tests / FPGA test
Hyper310 ROM_EXT Tests  /  FPGA test
11m 21s
Hyper310 ROM_EXT Tests / FPGA test
CW310 SiVal Tests  /  FPGA test
21m 41s
CW310 SiVal Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
32m 19s
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 Manufacturing Tests  /  FPGA test
24m 27s
CW310 Manufacturing Tests / FPGA test
CW340 Test ROM Tests  /  FPGA test
3m 14s
CW340 Test ROM Tests / FPGA test
CW340 ROM Tests  /  FPGA test
59s
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
4m 21s
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
17m 34s
CW340 SiVal Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
3m 20s
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
33m 56s
CW340 Manufacturing Tests / FPGA test
Cache bitstreams to GCP
0s
Cache bitstreams to GCP
Verify FPGA jobs
22s
Verify FPGA jobs
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Annotations

9 errors
Verilated English Breakfast
Process completed with exit code 1.
Lint (slow)
Countermeasure check failed.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Some target names have banned characters.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Countermeasure check failed.
Lint (slow)
Process completed with exit code 1.
Build and test software
Process completed with exit code 1.

Artifacts

Produced during runtime
Name Size
chip_englishbreakfast_cw305
1.38 MB
execute_manuf_fpga_tests_cw310-targets
623 Bytes
execute_manuf_fpga_tests_cw310-test-results
59.6 KB
execute_manuf_fpga_tests_cw340-targets
594 Bytes
execute_manuf_fpga_tests_cw340-test-results
56.5 KB
execute_rom_ext_fpga_tests_cw310-targets
598 Bytes
execute_rom_ext_fpga_tests_cw310-test-results
30.6 KB
execute_rom_ext_fpga_tests_cw340-targets
427 Bytes
execute_rom_ext_fpga_tests_cw340-test-results
7.13 KB
execute_rom_fpga_tests_cw310-targets
1.73 KB
execute_rom_fpga_tests_cw310-test-results
45.9 KB
execute_rom_fpga_tests_cw340-targets
162 Bytes
execute_rom_fpga_tests_cw340-test-results
201 Bytes
execute_sival_fpga_tests_cw310-targets
784 Bytes
execute_sival_fpga_tests_cw310-test-results
37.6 KB
execute_sival_fpga_tests_cw340-targets
507 Bytes
execute_sival_fpga_tests_cw340-test-results
40.8 KB
execute_sival_rom_ext_fpga_tests_cw310-targets
2.27 KB
execute_sival_rom_ext_fpga_tests_cw310-test-results
187 KB
execute_sival_rom_ext_fpga_tests_cw340-targets
449 Bytes
execute_sival_rom_ext_fpga_tests_cw340-test-results
19.8 KB
execute_test_rom_fpga_tests_cw310-targets
326 Bytes
execute_test_rom_fpga_tests_cw310-test-results
3.25 KB
execute_test_rom_fpga_tests_cw340-targets
258 Bytes
execute_test_rom_fpga_tests_cw340-test-results
45.5 KB
partial-build-bin-chip_earlgrey_cw310
6.02 MB
partial-build-bin-chip_earlgrey_cw310_hyperdebug
5.97 MB
partial-build-bin-chip_earlgrey_cw340
10.1 MB
sw_build_test-test-results
73.6 KB
verilated_englishbreakfast
7.05 MB
verilator_earlgrey-test-results
9.08 KB