Tek4404 work_in_progress.

src/devices/cpu/m68000/m68010.cpp

@@ -18,6 +18,11 @@ m68010_device::m68010_device(const machine_config &mconfig, const char *tag, dev
 {
 }
 
+m68010_device::m68010_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock, address_map_constructor internal_map)
+	: m68000_musashi_device(mconfig, tag, owner, clock, M68010, 16,24, internal_map)
+{
+}
+
 void m68010_device::device_start()
 {
 	m68000_musashi_device::device_start();

src/devices/cpu/m68000/m68010.h

@@ -12,6 +12,7 @@ class m68010_device : public m68000_musashi_device
 public:
 	// construction/destruction
 	m68010_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+	m68010_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock, address_map_constructor internal_map);
 
 	virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
 

src/devices/cpu/m68000/m68kcpu.h

@@ -604,11 +604,28 @@ inline u32 m68ki_read_imm_16()
 	result = MASK_OUT_ABOVE_16(m_pref_data);
 	m_pc += 2;
 	if (!m_mmu_tmp_buserror_occurred) {
+
+		u32 tmp_dar[16];
+		for (int i = 15; i >= 0; i--)
+		{
+			tmp_dar[i] = REG_DA()[i];
+		}
+
 		// prefetch only if no bus error occurred in opcode fetch
 		m_pref_data = m68ki_ic_readimm16(m_pc);
 		m_pref_addr = m_mmu_tmp_buserror_occurred ? ~0 : m_pc;
-		// ignore bus error on prefetch
-		m_mmu_tmp_buserror_occurred = 0;
+
+		// restore cpu address registers to value at start of instruction
+		if (m_mmu_tmp_buserror_occurred)
+		for (int i = 15; i >= 0; i--)
+		{
+			if (REG_DA()[i] != tmp_dar[i])
+			{
+				REG_DA()[i] = tmp_dar[i];
+			}
+		}
+
+
 	}
 
 	return result;

src/devices/machine/am9513.cpp

@@ -32,10 +32,15 @@
 #define LOG_MODE  (1U << 1)
 #define LOG_INPUT (1U << 2)
 #define LOG_TC    (1U << 3)
+#define LOG_WARN    (1U << 4)
+
 //#define VERBOSE (LOG_GENERAL | LOG_MODE)
+//#define VERBOSE -1
 
 #include "logmacro.h"
 
+#define LOGWARN(...)	LOGMASKED(LOG_WARN, "WARNING: " __VA_ARGS__)
+
 
 //**************************************************************************
 //  TYPE DEFINITIONS
@@ -448,7 +453,7 @@ void am9513_device::set_counter_mode(int c, u16 data)
 	}
 
 	if ((data & 0x0018) != (m_counter_mode[c] & 0x0018))
-		LOGMASKED(LOG_MODE, "Counter %d: %s %s count\n", c + 1, BIT(data, 4) ? "BCD" : "Binary", BIT(data, 3) ? "up" : "down");
+		LOGMASKED(LOG_MODE, "Counter %d: %s %s count %s\n", c + 1, BIT(data, 4) ? "BCD" : "Binary", BIT(data, 3) ? "up" : "down", BIT(data, 5) ? "repetitively" : "once");
 
 	if ((data & 0x0007) != (m_counter_mode[c] & 0x0007))
 	{
@@ -620,8 +625,13 @@ void am9513_device::set_tc(int c, bool state)
 
 	// TC cascading
 	if ((m_counter_mode[d] & 0x1f00) == (state ? 0x0000 : 0x1000))
+	{
+		LOGMASKED(LOG_TC, "Counter %d: TC cascade Next Count %u \n", c + 1, m_count[d]);
+
 		count_edge(d);
 
+	}
+
 	// TC gating
 	if ((m_counter_mode[d] & 0xe000) == 0x2000)
 		gate_count(d, state && (bus_is_16_bit() || m_gate_alt[d]));
@@ -976,7 +986,7 @@ void am9513_device::write_gate_alt(int c, bool level)
 {
 	if (bus_is_16_bit())
 	{
-		logerror("Gate %dA written when configured as DB%d\n", c + 1, c + 8);
+		LOGWARN("Gate %dA written when configured as DB%d\n", c + 1, c + 8);
 		return;
 	}
 
@@ -1102,7 +1112,7 @@ void am9513_device::internal_write(u16 data)
 		set_master_mode(data);
 		break;
 	case 0x1f: // Status register (read only?)
-		logerror("Writing %04X to status register\n", data);
+		LOGWARN("Writing %04X to status register\n", data);
 		break;
 	case 0x07: // Alarm 1 register
 	case 0x0f: // Alarm 2 register
@@ -1138,7 +1148,7 @@ void am9513_device::internal_write(u16 data)
 		m_counter_hold[(m_dpr & 7) - 1] = data;
 		break;
 	default: // Invalid register
-		logerror("Writing %04X to register %02X\n", data, m_dpr);
+		LOGWARN("Writing %04X to register %02X\n", data, m_dpr);
 		break;
 	}
 }
@@ -1217,7 +1227,7 @@ void am9513_device::command_write(u8 data)
 	case 0x00:
 		if ((data & 0x07) == 0x00 || (data & 0x07) == 0x06)
 		{
-			logerror("Invalid register selected: %02X\n", data);
+			LOGWARN("Invalid register selected: %02X\n", data);
 			break;
 		}
 
@@ -1238,7 +1248,10 @@ void am9513_device::command_write(u8 data)
 				if (BIT(data, 6))
 					step_counter(c, true);
 				if (BIT(data, 5))
+				{
+					LOGMASKED(LOG_MODE, "Arm Counter %d\n", c + 1);
 					arm_counter(c);
+				}
 			}
 		}
 		break;
@@ -1251,9 +1264,15 @@ void am9513_device::command_write(u8 data)
 			if (BIT(data, c))
 			{
 				if (!BIT(data, 5))
+				{
+					LOGMASKED(LOG_MODE, "Disarm Counter %d\n", c + 1);
 					disarm_counter(c);
+				}
 				if (!BIT(data, 6))
+				{
+					LOGMASKED(LOG_MODE, "Save Counter %d\n", c + 1);
 					save_counter(c);
+				}
 			}
 		}
 		break;
@@ -1270,20 +1289,23 @@ void am9513_device::command_write(u8 data)
 		case 0xe3: case 0xeb: // Clear/set toggle out for counter 3
 		case 0xe4: case 0xec: // Clear/set toggle out for counter 4
 		case 0xe5: case 0xed: // Clear/set toggle out for counter 5
+			LOGMASKED(LOG_MODE, "Counter %d: %s output\n", data & 7, BIT(data, 3) ? "Set" : "Clear");
 			set_toggle((data & 7) - 1, BIT(data, 3));
 			break;
 		case 0xe6: case 0xee: // Clear/set MM12 (FOUT gate on/FOUT gate off)
 			LOGMASKED(LOG_MODE, "FOUT: Gate %s\n", BIT(data, 3) ? "Off" : "On");
 			m_mmr = ((m_mmr & ~(1 << 12)) | BIT(data, 3) << 12);
 			break;
 		case 0xe7: case 0xef: // Clear/set MM13 (8-bit bus/16-bit bus)
+			LOGMASKED(LOG_MODE, "Data Bus Width = %d-Bit\n", BIT(data, 3) ? 16 : 8);
 			m_mmr = ((m_mmr & ~(1 << 13)) | BIT(data, 3) << 13);
 			break;
 		case 0xf1: // Step counter 1
 		case 0xf2: // Step counter 2
 		case 0xf3: // Step counter 3
 		case 0xf4: // Step counter 4
 		case 0xf5: // Step counter 5
+			LOGMASKED(LOG_MODE, "Counter %d: Step\n", data & 7);
 			step_counter((data & 7) - 1, false);
 			break;
 		case 0xff: // Master reset
@@ -1298,7 +1320,7 @@ void am9513_device::command_write(u8 data)
 			}
 			[[fallthrough]];
 		default:
-			logerror("Invalid command: %02X\n", data);
+			LOGWARN("Invalid command: %02X\n", data);
 			break;
 		}
 		break;
@@ -1391,7 +1413,7 @@ void am9513_device::write8(offs_t offset, u8 data)
 	if (BIT(offset, 0))
 	{
 		if (data == 0xef)
-			logerror("16-bit data bus selected with 8-bit write\n");
+			LOGWARN("16-bit data bus selected with 8-bit write\n");
 		command_write(data);
 	}
 	else
@@ -1410,7 +1432,7 @@ u16 am9513_device::read16(offs_t offset)
 	else
 	{
 		if (!bus_is_16_bit())
-			logerror("16-bit data read in 8-bit bus mode\n");
+			LOGWARN("16-bit data read in 8-bit bus mode\n");
 		return data_read();
 	}
 }
@@ -1423,19 +1445,20 @@ u16 am9513_device::read16(offs_t offset)
 void am9513_device::write16(offs_t offset, u16 data)
 {
 	if ((!bus_is_16_bit() || BIT(offset, 0)) && (data & 0xff00) != 0xff00)
-		logerror("Errant write of %02X to upper byte of %s register in %d-bit bus mode\n",
+		LOGWARN("Errant write of %02X to upper byte of %s register in %d-bit bus mode\n",
 				(data & 0xff00) >> 8,
 				BIT(offset, 0) ? "control" : "data",
 				bus_is_16_bit() ? 16 : 8);
 
 	if (BIT(offset, 0))
 	{
+		command_write(data & 0x00ff);
+
+		// NB testing afterwards because this command may have been changing bus width
 		if ((data & 0x00ff) == 0x00e7)
-			logerror("8-bit data bus selected with 16-bit write\n");
+			LOGWARN("8-bit data bus selected with 16-bit write\n");
 		else if ((data & 0x00ff) == 0x00ef && !bus_is_16_bit())
-			logerror("16-bit data bus selected\n");
-
-		command_write(data & 0x00ff);
+			LOGWARN("16-bit data bus selected\n");
 	}
 	else
 		data_write(data);

src/devices/machine/ncr5385.cpp

@@ -171,14 +171,18 @@ void ncr5385_device::scsi_ctrl_changed()
 
 	if ((ctrl & S_BSY) && !(ctrl & S_SEL))
 	{
-		LOGMASKED(LOG_STATE, "scsi_ctrl_changed 0x%03x phase %s%s%s\n", ctrl, nscsi_phase[ctrl & S_PHASE_MASK],
-			ctrl & S_REQ ? " REQ" : "", ctrl & S_ACK ? " ACK" : "");
+		LOGMASKED(LOG_STATE, "scsi_ctrl_changed 0x%03x phase %s%s%s pc(%s)\n", ctrl, nscsi_phase[ctrl & S_PHASE_MASK],
+			ctrl & S_REQ ? " REQ" : "", ctrl & S_ACK ? " ACK" : "", machine().describe_context());
 
 		if (m_state != IDLE)
 			m_state_timer->adjust(attotime::zero);
 	}
 	else if (ctrl & S_BSY)
+	{
 		LOGMASKED(LOG_STATE, "scsi_ctrl_changed 0x%03x arbitration/selection\n", ctrl);
+		if (m_state != IDLE)
+			m_state_timer->adjust(attotime::from_usec(40));
+	}
 	else
 	{
 		LOGMASKED(LOG_STATE, "scsi_ctrl_changed 0x%03x BUS FREE\n", ctrl);
@@ -352,6 +356,9 @@ void ncr5385_device::cmd_w(u8 data)
 	}
 	else
 	{
+		// we assume everything here generates an IRQ?
+		// assert(data & CMD_INT);
+
 		// interrupting commands
 		m_aux_status &= ~AUX_STATUS_DATA_FULL;
 		m_cmd = data;
@@ -477,6 +484,7 @@ void ncr5385_device::dma_w(u8 data)
 	m_state_timer->adjust(attotime::zero);
 }
 
+
 void ncr5385_device::state_timer(s32 param)
 {
 	// step state machine
@@ -687,6 +695,8 @@ int ncr5385_device::state_step()
 			// clear ACK except after last byte of message input phase
 			if (!remaining() && (ctrl & S_PHASE_MASK) == S_PHASE_MSG_IN)
 			{
+				LOGMASKED(LOG_STATE, "xfi_in: INT_FUNC_COMPLETE\n" );
+
 				m_int_status |= INT_FUNC_COMPLETE;
 				m_state = IDLE;
 
@@ -716,7 +726,8 @@ int ncr5385_device::state_step()
 			}
 			else
 			{
-				LOGMASKED(LOG_STATE, "xfi_out: %s\n", remaining() ? "phase change" : "transfer complete");
+				LOGMASKED(LOG_STATE, "xfi_out: %s pc(%s)\n", remaining() ? "phase change" : "transfer complete", machine().describe_context());
+
 				m_int_status |= INT_BUS_SERVICE;
 				m_state = IDLE;
 
@@ -726,6 +737,7 @@ int ncr5385_device::state_step()
 		else
 			delay = -1;
 		break;
+
 	case XFI_OUT_DRQ:
 		m_state = XFI_OUT_ACK;
 		m_aux_status &= ~AUX_STATUS_DATA_FULL;
@@ -759,9 +771,12 @@ int ncr5385_device::state_step()
 			else
 				m_sbx = false;
 
+			delay = 3'500;		// >=3.5us delay works, < 3.5us fails
+
 			// clear data and ACK
 			scsi_bus->data_w(scsi_refid, 0);
 			scsi_bus->ctrl_w(scsi_refid, 0, S_ACK);
+
 		}
 		else
 			delay = -1;
@@ -820,9 +835,9 @@ void ncr5385_device::update_int()
 	bool const int_state = m_int_status & (INT_FUNC_COMPLETE | INT_BUS_SERVICE |
 			INT_DISCONNECTED | INT_SELECTED | INT_RESELECTED | INT_INVALID_CMD);
 
+	LOGMASKED(LOG_COMMAND, "update_int 0x%02x (0x%02x)  pc(%s)\n", m_int_status, m_int_state, machine().describe_context());
 	if (m_int_state != int_state)
 	{
-		LOG("update_int %d\n", int_state);
 
 		m_aux_status &= ~(AUX_STATUS_MSG | AUX_STATUS_CD | AUX_STATUS_IO);
 		if (int_state)

src/devices/machine/nscsi_bus.cpp

@@ -14,8 +14,8 @@
 #define LOG_DATA        (1U << 4)
 #define LOG_DATA_SENT   (1U << 5)
 
-#define VERBOSE (LOG_UNSUPPORTED)
-//#define LOG_OUTPUT_FUNC osd_printf_info
+//#define VERBOSE (LOG_GENERAL | LOG_STATE | LOG_CONTROL | LOG_DATA)
+//#define VERBOSE (LOG_UNSUPPORTED)
 
 #include "logmacro.h"
 
@@ -80,16 +80,16 @@ void nscsi_bus_device::regen_ctrl(int refid)
 					data);
 		for(int i=0; i<devcnt; i++)
 			if(dev[i].ctrl) {
-				LOGMASKED(LOG_CONTROL, "%d=%s%s%s%s%s%s%s%s%s\n", i,
+				LOGMASKED(LOG_CONTROL, "dev%d=%s%s%s%s%s%s%s%s%s\n", i,
 							dev[i].ctrl & nscsi_device::S_RST ? "R" : "",
 							dev[i].ctrl & nscsi_device::S_ATN ? "A" : "",
 							dev[i].ctrl & nscsi_device::S_ACK ? "K" : "",
 							dev[i].ctrl & nscsi_device::S_REQ ? "Q" : "",
+							dev[i].ctrl & nscsi_device::S_SEL ? "S" : "",
+							dev[i].ctrl & nscsi_device::S_BSY ? "B" : "",
 							dev[i].ctrl & nscsi_device::S_MSG ? "M" : "",
-							dev[i].ctrl & nscsi_device::S_INP ? "I" : "",
 							dev[i].ctrl & nscsi_device::S_CTL ? "C" : "",
-							dev[i].ctrl & nscsi_device::S_SEL ? "S" : "",
-							dev[i].ctrl & nscsi_device::S_BSY ? "B" : "");
+							dev[i].ctrl & nscsi_device::S_INP ? "I" : "");
 			}
 	}